TMS570LC4357: FSEG_ID not set in the self test routine.

Hello Bartek,

What is the value of TEST_DONE bit and TEST_FAIL bit of STC global status register?

Both are 1, the STCGSTAT register is filled with 0x00000503 after configuring the STC1 for segment 1 self test run.

Hello,

The maximum STC clock for LC43x device is 110MHz. If GCLK1=300, the CLKDIV should be >=2.

Device#47 in Errata says that user cannot run STC test on interval 1 alone.

Ok, thank you for the suggestions. BTW, it appears that my device is silicon revision B.

I'm using clock dividers as suggested already. I've also tried with maximum value, i.e. 7. And also tried to leave the STCCLKDIV unchanged after reset, it's value is then 0x03030303, instead of 0x00000000 as written in manual.

Does it mean that the  INTCOUNT value in STCGCR0 must be set to 2? So the value in that register before the self test is enabled shall be 0x00020001? I've tried that but the FSEG_ID field in STCFSTAT register still reads 0 when the SEGID_PLOAD is set to 1 when the STC run is initiated.

If you know how to properly initiate the self test procedure for STC1 segment 1 could you please share the correct values and sequence for the configuration registers?

Hello,

I run STC test using the SDL (safeTI Diagnostic Library) API: SL_Selftest_STC(...).

Hi,

Thanks. I took a look in the source code of that function. I see that the test result is verified in call to the SL_SelfTest_Status_STC. However FSEG_ID field is not read in that call, it's ignored. The SL_SelfTest_STC  is testing only segment 0, I don't see segment 1 tested there.

Regards,

Bartek

If you set INTCOUNT of STCGCR0 register with 125+3 and leave STCSEGPLR by default, then both segments should be tested.

If you set INTCOUNT of STCGCR0 register with 3 and write 1 to STCSEGPLR, the segment 1 will be tested.

Hi,

Thanks for the suggestion, but I don't think this is what I'm looking for. What you advised is a INTCOUNT values for the STC test run of segment 0 and/or 1.

What I'm looking for is a sequence for doing STC selftest i.e. testing of the STC itself with using error insertion,  so we can be sure that the STC is able to detect and report errors. This is done by writing the STCSCSCR register fields SELF_CHECK_KEY and FAULT_INS.

I've also tried to run self test setting the INTCOUNT to 3, STCSEGPLR to 1 and after the test was done I still get FSEG_ID  not set to 01 as expected:

Regards,

Bartek