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CCS/RM41L232: IEC 60730 for Hercules

ROHITH Shanbhagh
Prodigy 210 points
Part Number: RM41L232
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Hello,

In "IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules" document

under Table 2

for memory component, defined as ECC with address for SRAM/Flash as acceptable measures and for Internal data paths component, defined as Memory with ECC as acceptable measures.

Whether both acceptable measures are the same?

  • 0
    TI__Guru**** 198766 points

    Hello Rohith,

    The ECC logics for the access of  SRAM/Flash are located in CPU and memory wrapper (SRAM wrapper, flash wrapper). The ECC logic in CPU calculates the ECC of the data payload and compares the calculated ECC with the ECC value from memory. The ECC calculation doesn't include the address.

    The Flash wrapper ECC logic calculates the ECC using the data payload and the address, and writes this ECC to ECC memory. When reading data from flash, the flash wrapper will strip the address component from the ECC and provide the re-generated ECC code to the bus master. 

    The SRAM wrapper uses redundant address decoding scheme for safety by checking the decoding of address lines. The output of the primary address decode logic and the redundant logic is compared during RAM access and if the compare fails then redundant address error will be flagged.

  • 0 in reply to QJ Wang
    Prodigy 210 points

    Hello Wang,

    Which halcogen self-test API can be used for the Internal data paths component.

  • 0 in reply to ROHITH Shanbhagh
    TI__Guru**** 198766 points

    Hello Rohith,

    The example functions for flash ECC selftest and RAM ECC selftest are in sys_selftest.c:

    void checkFlashECC(void)

    void checkRAMECC(void)