Other Parts Discussed in Thread: HALCOGEN
Hello,
in my application I have to enable parity check for some modules: VIM, ADC, HET, so in Halcogen I flagged the corresponding boxes "Enable Parity RAM" in the module tabs and the Memory Parity Self Check Enable in the "SAFETY INIT" tab. Consequently, the following code is generated in sys_startup.c:
/* Enable parity on selected RAMs */
enableParity();
/* Initialize all on-chip SRAMs except for MibSPIx RAMs
* The MibSPIx modules have their own auto-initialization mechanism which is triggered
* as soon as the modules are brought out of local reset.
*/
/* The system module auto-init will hang on the MibSPI RAM if the module is still in local reset.
*/
/* NOTE : Please Refer DEVICE DATASHEET for the list of Supported Memories and their channel numbers.
Memory Initialization is perfomed only on the user selected memories in HALCoGen's GUI SAFETY INIT tab.
*/
memoryInit( (uint32)((uint32)0U << 1U) /* DMA RAM */
| (uint32)((uint32)1U << 2U) /* VIM RAM */
| (uint32)((uint32)0U << 5U) /* CAN1 RAM */
| (uint32)((uint32)0U << 6U) /* CAN2 RAM */
| (uint32)((uint32)0U << 10U) /* CAN3 RAM */
| (uint32)((uint32)1U << 8U) /* ADC1 RAM */
| (uint32)((uint32)1U << 14U) /* ADC2 RAM */
| (uint32)((uint32)1U << 3U) /* HET1 RAM */
| (uint32)((uint32)0U << 4U) /* HTU1 RAM */
| (uint32)((uint32)0U << 15U) /* HET2 RAM */
| (uint32)((uint32)0U << 16U) /* HTU2 RAM */
);
/* Disable parity */
disableParity();
/* Test the parity protection mechanism for peripheral RAMs
NOTE : Please Refer DEVICE DATASHEET for the list of Supported Memories with parity.
Parity Self check is perfomed only on the user selected memories in HALCoGen's GUI SAFETY INIT tab.
*/
/* USER CODE BEGIN (57) */
/* USER CODE END */
het1ParityCheck();
/* USER CODE BEGIN (61) */
/* USER CODE END */
adc1ParityCheck();
/* USER CODE BEGIN (62) */
/* USER CODE END */
adc2ParityCheck();
/* USER CODE BEGIN (66) */
/* USER CODE END */
vimParityCheck();
I am a little confused about this auto-generated code because initially enableParity() enables ram parity for my modules, then disableParity() disables it for each each of them and last the het1ParityCheck, adc1ParityCheck, adc2ParityCheck, vimParityCheck functions execute the parity checks. In each of these check functions:
- the status of the parity control register is saved in a variable. Its value is actually 0x5U because of the previous call of disableParity()
- parity checking is enabled (by writing 0xAU in the parity control register)
- the parity test is executed (by flipping the parity bit etc)
- finally, the parity control register is restored by writing in it the value of the variable mentioned at step 1).
So, as the value of the variable is still 0x5U at the end of the parity check functions, the parity control seems to be disabled for each module after the execution of the check functions: am I right? If so, I'm surprised because it collapses with the Halcogen properties I set as the PCR registers doesn't seem to be modified after the execution of the check functions. Should I re-enable the Parity Control Registers, for example by calling again enableParity(), before the application call or in another section of the code?
Thank you for your cooperation,
Sonia
