RM57L843: Getting started with Ethernet custom PHY

Pratik Naphade

Intellectual 440 points

Part Number: RM57L843
Other Parts Discussed in Thread: TLK111, DP83640, HALCOGEN,

Hello Team,

We are trying to implement ethernet communication between PC and Hercules.

And we have a custom board on which ethernet physical layer transceiver KSZ8081rna (Microchip) is present.

My question is how and where should I start to get the communication work.

Please guide us. And let us know do you have any driver files written for transceiver KSZ8081rna ?

Thanks,

Pratik.

over 5 years ago

0 QJ Wang over 5 years ago

TI__Guru**** 201376 points

Hello Pratik,

We don't have driver for PHY KSZ8081. You can use the drivers for dp83640 and Tlk111 as start point to develop your own driver for KSZ8081 PHY. dp83640.c and tlk111.c are generated by HALCoGen.

0 QJ Wang over 5 years ago in reply to QJ Wang

TI__Guru**** 201376 points

This is a good application note for KSZ8081 vs DP83826:

0 Pratik Naphade over 5 years ago in reply to QJ Wang

Intellectual 440 points

Hi, thanks for the above information.

We have done the changes as per pdf sent by you.

Also we have written the driver for KSZ8081RNA by refering the function implementations as per DP83640 given on eval kit of RM57L843

below is the function implementation for get ID and macro for PHYID1 and PHYID2,

#define KSZ_PHYID1 0x02 // PHY Idendifier 1
#define KSZ_PHYID2 0x03 // PHY Idendifier 2

uint32 Ksz8081IDGet(uint32 mdioBaseAddr, uint32 phyAddr)
{
uint32 id = 0U;
uint16 data = 0U;

/* read the ID1 register */
(void)MDIOPhyRegRead(mdioBaseAddr, phyAddr, (uint32)KSZ_PHYID1, &data);

/* update the ID1 value */
id = (uint32)data;
id = (uint32)((uint32)id << 16);

/* read the ID2 register */
(void)MDIOPhyRegRead(mdioBaseAddr, phyAddr, (uint32)KSZ_PHYID2, &data);

/* update the ID2 value */
id |= data;

/* return the ID in ID1:ID2 format */
return id;
}

After debugging this function, function is returning id=0, so how can we confrm that what ID should be return here.

Also how can we check whether signals are reaching to PHY IC. How can we analyse these signals?

Thanks

Pratik

0 QJ Wang over 5 years ago in reply to Pratik Naphade

TI__Guru**** 201376 points

Hello Pratik,

Your read function doesn't work. The PHY IDs should not be 0x00. Please make sure the HW connection between MCU and PHY is ok.

0 Pratik Naphade over 5 years ago in reply to QJ Wang

Intellectual 440 points

Hi,

We have checked the connections and PINMUX for RMII, I am attaching snap for PINMUX selection on HALCOGEN.

Below is the PINMUX init function.

void muxInit(void){

 

/* USER CODE BEGIN (1) */
/* USER CODE END */

 

    /* Enable Pin Muxing */
    pinMuxReg->KICKER0 = 0x83E70B13U;
    pinMuxReg->KICKER1 = 0x95A4F1E0U;
    
/* USER CODE BEGIN (2) */
/* USER CODE END */

 

    pinMuxReg->PINMUX[0] = PINMUX_BALL_N19_RMII_RX_ER | PINMUX_BALL_D4_EMIF_ADDR_00 | PINMUX_BALL_D5_EMIF_ADDR_01 | PINMUX_BALL_C4_EMIF_ADDR_06;
    
    pinMuxReg->PINMUX[1] = PINMUX_BALL_C5_EMIF_ADDR_07 | PINMUX_BALL_C6_EMIF_ADDR_08 | PINMUX_BALL_C7_EMIF_ADDR_09 | PINMUX_BALL_C8_EMIF_ADDR_10;
    
    pinMuxReg->PINMUX[2] = PINMUX_BALL_C9_EMIF_ADDR_11 | PINMUX_BALL_C10_EMIF_ADDR_12 | PINMUX_BALL_C11_EMIF_ADDR_13 | PINMUX_BALL_C12_EMIF_ADDR_14;
    
    pinMuxReg->PINMUX[3] = PINMUX_BALL_C13_EMIF_ADDR_15 | PINMUX_BALL_D14_EMIF_ADDR_16 | PINMUX_BALL_C14_EMIF_ADDR_17 | PINMUX_BALL_D15_EMIF_ADDR_18;
    
    pinMuxReg->PINMUX[4] = PINMUX_BALL_C15_EMIF_ADDR_19 | PINMUX_BALL_C16_EMIF_ADDR_20 | PINMUX_BALL_C17_EMIF_ADDR_21;
    
    pinMuxReg->PINMUX[5] = 0U;
    
    pinMuxReg->PINMUX[6] = 0U;
    
    pinMuxReg->PINMUX[7] = 0U;
    
    pinMuxReg->PINMUX[8] = PINMUX_BALL_D16_EMIF_BA_1;
    
    pinMuxReg->PINMUX[9] = PINMUX_BALL_R4_EMIF_nCAS | PINMUX_BALL_N17_EMIF_nCS_0 | PINMUX_BALL_L17_EMIF_nCS_2;
    
    pinMuxReg->PINMUX[10] = PINMUX_BALL_K17_EMIF_nCS_3 | PINMUX_BALL_M17_EMIF_nCS_4 | PINMUX_BALL_R3_EMIF_nRAS | PINMUX_BALL_P3_EMIF_nWAIT;
    
    pinMuxReg->PINMUX[11] = PINMUX_BALL_D17_EMIF_nWE | PINMUX_BALL_E9_ETMDATA_08 | PINMUX_BALL_E8_ETMDATA_09 | PINMUX_BALL_E7_ETMDATA_10;
    
    pinMuxReg->PINMUX[12] = PINMUX_BALL_E6_ETMDATA_11 | PINMUX_BALL_E13_ETMDATA_12 | PINMUX_BALL_E12_ETMDATA_13 | PINMUX_BALL_E11_ETMDATA_14;
    
    pinMuxReg->PINMUX[13] = PINMUX_BALL_E10_ETMDATA_15 | PINMUX_BALL_K15_ETMDATA_16 | PINMUX_BALL_L15_ETMDATA_17 | PINMUX_BALL_M15_ETMDATA_18;
    
    pinMuxReg->PINMUX[14] = PINMUX_BALL_N15_ETMDATA_19 | PINMUX_BALL_E5_ETMDATA_20 | PINMUX_BALL_F5_ETMDATA_21 | PINMUX_BALL_G5_ETMDATA_22;
    
    pinMuxReg->PINMUX[15] = PINMUX_BALL_K5_ETMDATA_23 | PINMUX_BALL_L5_ETMDATA_24 | PINMUX_BALL_M5_ETMDATA_25 | PINMUX_BALL_N5_ETMDATA_26;
    
    pinMuxReg->PINMUX[16] = PINMUX_BALL_P5_ETMDATA_27 | PINMUX_BALL_R5_ETMDATA_28 | PINMUX_BALL_R6_ETMDATA_29 | PINMUX_BALL_R7_ETMDATA_30;
    
    pinMuxReg->PINMUX[17] = PINMUX_BALL_R8_ETMDATA_31 | PINMUX_BALL_R9_ETMTRACECLKIN | PINMUX_BALL_R10_ETMTRACECLKOUT | PINMUX_BALL_R11_ETMTRACECTL;
    
    pinMuxReg->PINMUX[18] = PINMUX_BALL_B15_FRAYTX1 | PINMUX_BALL_B8_FRAYTX2 | PINMUX_BALL_B16_FRAYTXEN1 | PINMUX_BALL_B9_FRAYTXEN2;
    
    pinMuxReg->PINMUX[19] = PINMUX_BALL_C1_GIOA_2 | PINMUX_BALL_E1_GIOA_3 | PINMUX_BALL_B5_GIOA_5 | PINMUX_BALL_H3_GIOA_6;
    
    pinMuxReg->PINMUX[20] = PINMUX_BALL_M1_GIOA_7 | PINMUX_BALL_F2_GIOB_2 | PINMUX_BALL_W10_GIOB_3 | PINMUX_BALL_J2_GIOB_6;
    
    pinMuxReg->PINMUX[21] = PINMUX_BALL_F1_GIOB_7 | PINMUX_BALL_R2_MIBSPI1NCS_0 | PINMUX_BALL_F3_MIBSPI1NCS_1 | PINMUX_BALL_G3_MDIO;
    
    pinMuxReg->PINMUX[22] = PINMUX_BALL_J3_MIBSPI1NCS_3 | PINMUX_BALL_G19_MIBSPI1NENA | PINMUX_BALL_V9_MIBSPI3CLK | PINMUX_BALL_V10_MIBSPI3NCS_0;
    
    pinMuxReg->PINMUX[23] = PINMUX_BALL_V5_MDCLK | PINMUX_BALL_B2_MIBSPI3NCS_2 | PINMUX_BALL_C3_MIBSPI3NCS_3 | PINMUX_BALL_W9_MIBSPI3NENA;
    
    pinMuxReg->PINMUX[24] = PINMUX_BALL_W8_MIBSPI3SIMO | PINMUX_BALL_V8_MIBSPI3SOMI | PINMUX_BALL_H19_RMII_TXEN | PINMUX_BALL_E19_MIBSPI5NCS_0;
    
    pinMuxReg->PINMUX[25] = PINMUX_BALL_B6_MIBSPI5NCS_1 | PINMUX_BALL_W6_MIBSPI5NCS_2 | PINMUX_BALL_T12_MIBSPI5NCS_3 | PINMUX_BALL_H18_MIBSPI5NENA;
    
    pinMuxReg->PINMUX[26] = PINMUX_BALL_J19_RMII_TXD_1 | PINMUX_BALL_E16_MIBSPI5SIMO_1 | PINMUX_BALL_H17_MIBSPI5SIMO_2 | PINMUX_BALL_G17_MIBSPI5SIMO_3;
    
    pinMuxReg->PINMUX[27] = PINMUX_BALL_J18_RMII_TXD_0 | PINMUX_BALL_E17_MIBSPI5SOMI_1 | PINMUX_BALL_H16_MIBSPI5SOMI_2 | PINMUX_BALL_G16_MIBSPI5SOMI_3;
    
    pinMuxReg->PINMUX[28] = PINMUX_BALL_K18_N2HET1_00 | PINMUX_BALL_V2_N2HET1_01 | PINMUX_BALL_W5_N2HET1_02 | PINMUX_BALL_U1_N2HET1_03;
    
    pinMuxReg->PINMUX[29] = PINMUX_BALL_B12_N2HET1_04 | PINMUX_BALL_V6_N2HET1_05 | PINMUX_BALL_W3_N2HET1_06 | PINMUX_BALL_T1_N2HET1_07;

 

    pinMuxReg->PINMUX[30] = PINMUX_BALL_E18_N2HET1_08 | PINMUX_BALL_V7_N2HET1_09 | PINMUX_BALL_D19_N2HET1_10 | PINMUX_BALL_E3_N2HET1_11;

 

    pinMuxReg->PINMUX[31] = PINMUX_BALL_B4_RMII_CRS_DV | PINMUX_BALL_N2_N2HET1_13 | PINMUX_BALL_N1_N2HET1_15 | PINMUX_BALL_A4_N2HET1_16;
    
    pinMuxReg->PINMUX[32] = PINMUX_BALL_A13_N2HET1_17 | PINMUX_BALL_J1_N2HET1_18 | PINMUX_BALL_B13_N2HET1_19 | PINMUX_BALL_P2_N2HET1_20;

 

    pinMuxReg->PINMUX[33] = PINMUX_BALL_H4_N2HET1_21 | PINMUX_BALL_B3_N2HET1_22 | PINMUX_BALL_J4_N2HET1_23 | PINMUX_BALL_P1_RMII_RXD_0;

 

    pinMuxReg->PINMUX[34] = PINMUX_BALL_A14_RMII_RXD_1 | PINMUX_BALL_K19_RMII_REFCLK | PINMUX_BALL_B11_N2HET1_30 | PINMUX_BALL_D8_N2HET2_01;
    
    pinMuxReg->PINMUX[35] = PINMUX_BALL_D7_N2HET2_02 | PINMUX_BALL_D3_N2HET2_12 | PINMUX_BALL_D2_N2HET2_13 | PINMUX_BALL_D1_N2HET2_14;
    
    pinMuxReg->PINMUX[36] = PINMUX_BALL_P4_N2HET2_19 | PINMUX_BALL_T5_N2HET2_20 | PINMUX_BALL_T4_MII_RX_AVCLK4 | PINMUX_BALL_U7_MII_TX_AVCLK4;
    
    pinMuxReg->PINMUX[37] = PINMUX_BALL_E2_N2HET2_03 | PINMUX_BALL_N3_N2HET2_07;
    
    pinMuxReg->PINMUX[80] = (SIGNAL_AD2EVT_T10 | 0x02020200U);

 

    pinMuxReg->PINMUX[81] = 0x02020202U;

 

    pinMuxReg->PINMUX[82] = 0x02020202U;

 

    pinMuxReg->PINMUX[83] = (SIGNAL_GIOA_0_A5 | 0x00020202U);

 

    pinMuxReg->PINMUX[84] = SIGNAL_GIOA_1_C2 | SIGNAL_GIOA_2_C1 | SIGNAL_GIOA_3_E1 | SIGNAL_GIOA_4_A6;

 

    pinMuxReg->PINMUX[85] = SIGNAL_GIOA_5_B5 | SIGNAL_GIOA_6_H3 | SIGNAL_GIOA_7_M1 | SIGNAL_GIOB_0_M2;

 

    pinMuxReg->PINMUX[86] = SIGNAL_GIOB_1_K2 | SIGNAL_GIOB_2_F2 | SIGNAL_GIOB_3_W10 | SIGNAL_GIOB_4_G1;

 

    pinMuxReg->PINMUX[87] = SIGNAL_GIOB_5_G2 | SIGNAL_GIOB_6_J2 | SIGNAL_GIOB_7_F1 | SIGNAL_MDIO_G3;

 

    pinMuxReg->PINMUX[88] = (SIGNAL_MIBSPI1NCS_4_U10 | SIGNAL_MIBSPI1NCS_5_U9 | 0x00020000U) ;

 

    pinMuxReg->PINMUX[89] = SIGNAL_MII_COL_F3 | SIGNAL_MII_CRS_B4;

 

    pinMuxReg->PINMUX[90] = SIGNAL_MII_RX_DV_B11 | SIGNAL_MII_RX_ER_N19 | SIGNAL_MII_RXCLK_K19 | SIGNAL_MII_RXD_0_P1;

 

    pinMuxReg->PINMUX[91] = SIGNAL_MII_RXD_1_A14 | SIGNAL_MII_RXD_2_G19 | SIGNAL_MII_RXD_3_H18 | SIGNAL_MII_TX_CLK_D19;

 

    pinMuxReg->PINMUX[92] = SIGNAL_N2HET1_17_A13 | SIGNAL_N2HET1_19_B13 | SIGNAL_N2HET1_21_H4 | SIGNAL_N2HET1_23_J4;

 

    pinMuxReg->PINMUX[93] = SIGNAL_N2HET1_25_M3 | SIGNAL_N2HET1_27_A9 | SIGNAL_N2HET1_29_A3 | SIGNAL_N2HET1_31_J17;

 

    pinMuxReg->PINMUX[94] = SIGNAL_N2HET2_00_D6 | SIGNAL_N2HET2_01_D8 | SIGNAL_N2HET2_02_D7 | SIGNAL_N2HET2_03_E2;

 

    pinMuxReg->PINMUX[95] = SIGNAL_N2HET2_04_D13 | SIGNAL_N2HET2_05_D12 | SIGNAL_N2HET2_06_D11 | SIGNAL_N2HET2_07_N3;

 

    pinMuxReg->PINMUX[96] = SIGNAL_N2HET2_08_K16 | SIGNAL_N2HET2_09_L16 | SIGNAL_N2HET2_10_M16 | SIGNAL_N2HET2_11_N16;

 

    pinMuxReg->PINMUX[97] = SIGNAL_N2HET2_12_D3 | SIGNAL_N2HET2_13_D2 | SIGNAL_N2HET2_14_D1 | SIGNAL_N2HET2_15_K4;

 

    pinMuxReg->PINMUX[98] = SIGNAL_N2HET2_16_L4 | SIGNAL_N2HET2_18_N4 | SIGNAL_N2HET2_20_T5 | SIGNAL_N2HET2_22_T7;

 

    pinMuxReg->PINMUX[99] = SIGNAL_nTZ1_1_N19 | SIGNAL_nTZ1_2_F1 | SIGNAL_nTZ1_3_J3;
    

 

    pinMuxReg->PINMUX[161] = 0x02020200U;

 

    pinMuxReg->PINMUX[162] = 0x02020202U;
    
    pinMuxReg->PINMUX[163] = 0x00020202U;
    

 

/* USER CODE BEGIN (3) */
/* USER CODE END */
    
    
    PINMUX_GATE_EMIF_CLK_ENABLE(OFF);
    PINMUX_EMIF_OUTPUT_ENABLE(OFF);
    PINMUX_GIOA_DISABLE_HET1_ENABLE(OFF);
    PINMUX_GIOB_DISABLE_HET2_ENABLE(OFF);
    PINMUX_ETHERNET_SELECT(RMII);
    PINMUX_ALT_ADC_TRIGGER_SELECT(1);

Please let us know anything requires further and do we need to change EMAC Address under EMAC tab?

Thanks,

Pratik.

0 QJ Wang over 5 years ago in reply to Pratik Naphade

TI__Guru**** 201376 points

Hi Pratik,

The configuration looks fine for me.

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RM57L843: Getting started with Ethernet custom PHY