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TM4C1294KCPDT: Used EPI block IOs

Part Number: TM4C1294KCPDT

I believe I understood that if not all the signals are needed from the EPI block, then the respective pins can still be used as GPIO, is this correct?

Just want to be 100% sure as I am already drawing up schematics.

  • Hello Nicholas,

    Which EPI mode is being used here? It depends on the mode settings but in general yes there is some flexibility here. Some modes outline which pins are freed up and for General Purpose mode it well depend how the configurations are made.

  • Host mode

    We are using 16 bit non muxed. No need for chip selects and no need for hi/lo byte selects… don’t need ALE either

    Nick

  • Hi Nick,

    The datasheet is a bit conflicting to me because it says the read/write strobes are optional for General Purpose mode but I am not seeing the setting to turn them off.

    Like for example...

    Use of the RD and WR outputs is controlled by the RW bit in the EPIGPCFG register. For interfaces where the direction is known (in advance, related to frame size, or other means), these strobes are not needed. For most other interfaces, RD and WR are used so the external peripheral knows what transaction is taking place, and if any transaction is taking place.

    But then I see no RW bit in the register listing. So there is no indicator that can actually be achieved here.

    So my assumption right now is that EPI0S28, EPI0S29, and EPI0S30 are used by the EPI in that mode. I would anticipate that configuring them as GPIO would cause an issue but I don't really have a setup to test beyond trying it without connecting anything to EPI bus. If those pins are not required, the easiest thing to do would be to leave them not connected.