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TMS570LS3137: MibSPI TGx-completed interrupt not generated

Part Number: TMS570LS3137
Other Parts Discussed in Thread: ADS1248

Hello there,

EDITED: MibSPI3 in master mode.

We're working on a project using the TMS570LS3137 in which the MibSPI3 is used in the multi-buffer mode. The TXRAM has been partitioned into 8 TGs. A complete TX sequence would be to start the first TG0, then wait for its TC INT before advancing to the next TG, and so on up to the last TG7.

With the TMS570HDK using the TMS570LS3137BGA MCU, the sequence is working well, and repeatedly. We didn't attached any device to MibSPI3 (clock, CS, SIMO, SOMI etc. are not connected).

We've now transitioned to our own design using a TMS570LS3137PGE MCU, with the MibSPI3 connected a two ADS1248 from TI. With the exact same software code, what we have noticed is that the sequence is not rolling, and a breakpoint into the MibSPI3 TG TC INT routine was never reached. Further observation is that the SPI serial clock output at the MCU level is not toggling at all.

I think that there is a possibility that the SPI serial clock output is being pulled down externally because of a bad pin, but need to check and confirm.

My question really is: Is there any glue logic inside the MCU that monitors permanently the SPI signals (such as SPI clock, nCS etc.), and decides that the TG has not completed (i.e. because no clock has been generated correctly), therefore not issuing programmed TC INT?

Thank you.

  • Hello Chuck,

    The MibSPI supports two lookback modes:

    1. Internal loop-back mode: test the SPI TX and RX paths (shift registers, SPI buffer registers, parity generator).

    2. IO loopback: test all the I/O pins (CLK, CS, SOMI, SIMO) without connecting to an external device.

    You can use mibspiEnableLoopback(mibspiBASE_t *mibspi, loopBackType_t Loopbacktype) to enable the loopback mode.

    Loopbacktype = Digital_Lbk or Analog_Lbk

  • Hello QJ,

    I’m afraid that your answer doesn’t respond to my question, because I don’t use any loop back mode. I’m just trying to understand what went wrong with my implementation.

    Could you please reread my question?

    Thanks.

  • I mean you can use loopback mode to check if CLK works as expected. 

    What is the trigger for TG0 to start it's first transfer? 

  • All SW trigger, by first clearing any existing TC flag and followed by enabling TC INT, then set the corresponding TGENA bit.

    Work on HDK, that’s why I’m looking the existence of any CLK  monitoring feature of the MibSPI device.

  • Please double check if the notification is enabled for MibSPI0: mibspiEnableGroupNotification(mibspiREG3, 0, 0);

    Is the SPIENA used by the  ADS1248? If the SPIENA is configured as a functional pin, and it is pulled high by ADS1248, the SPI master will hold the SPI clock until the SPIENA becomes LOW.

  • Hello QJ,

    Thank you for your support.

    It turned out that the ADS1248 initialization TG has not been transferred to the device before the channel reading TG, and once this was corrected, we can measured the SPI_CLK between the MCU and the ADS1248.

    It is understood however that if the ADS1248 device was not initialized, it should operate with default setting and according to the default timing, each channel conversion should still be completed within ~200ms. However, it didn't and we still don't understand how could the MCU not clocking data out due to the device working in its default timing. This is a 4-wire SPI interface between them, SOMI, SIMO, CLK and nCS ... don't understand!!!

    Anyway, it is working now and let's looking at it at a later time.

    Cheers!