Hello,
I am writing an application for the SM470R1B1M microcontroller and having problems with triggering the SCI TX interrupt. The RX interrupt works w/o problems. Here is the code:
void INIT_SCI(void)
{
//init for eval board SCI1
SCI1CTL3 &= ~SW_NRESET; // Reset SCI state machine
SCI1CCR = TIMING_MODE_ASYNC + CHAR_8; // Async, 8-bit Char
SCI1CTL1 |= RXENA; // RX enabled
SCI1CTL2 |= TXENA; // TX enabled
SCI1CTL3 |= CLOCK + RX_ACTION_ENA; // Internal clock. RX TX interrrupt
SCI1LBAUD = 0xC2; // 30MHz/(8*19200)-1
SCI1PC2 |= RX_FUNC; // SCIRX is the SCI receive pin
SCI1PC3 |= TX_FUNC; // SCITX is the SCI transmit pin
SCI1CTL2 &= ~TX_DMA_ENA; //From the datasheet: To use transmit interrupt functionality, the TX DMA ENA bit (SCICTL2.5) must be cleared
REQMASK |= (1 << CIM_SCI1RX); // Enable interrupt SCI1RX channel
REQMASK |= (1 << CIM_SCI1TX); // Enable interrupt SCI1TX channel
SCI1CTL3 |= SW_NRESET; // Configure SCI1 state machine
}//end of INIT_SCI
...
// enable SCI1 receive interrupt
REQMASK |= 0x00000400;
// enable SCI1 transmit interrupt
REQMASK |= 1<<CIM_SCI1TX;
...
__irq __arm void IRQ_Handler(void)
{
switch((0xFF & FIQIVEC)-1)
{
case CIM_COMP1:
COMP1_irq_handler();
break;
case CIM_SCI1RX: // uart1 rx interrupt
SCI1RX_irq_handler();
//LED_BLINK;
break;
case CIM_SCI1TX: // uart1 tx interrupt
SCI1TX_irq_handler();
//LED_BLINK;
break;
}
}//end of FIQ_Handler()
.....
__fiq __arm void FIQ_Handler(void) //used the same function as IRQ_Handler to be sure...
{
switch((0xFF & FIQIVEC)-1)
{
case CIM_COMP1:
COMP1_irq_handler();
break;
case CIM_SCI1RX: // uart1 rx interrupt
SCI1RX_irq_handler();
//LED_BLINK;
break;
case CIM_SCI1TX: // uart1 tx interrupt
SCI1TX_irq_handler();
//LED_BLINK;
break;
}
}//end of FIQ_Handler()
....
void Write_Serial_Port_One(unsigned char byte)
{
while(Tx_1_Queue_Full);
Tx_1_Queue[Tx_1_Queue_Write_Index] = byte;
// increment the queue byte count
Tx_1_Queue_Byte_Count++;
// increment the write pointer
Tx_1_Queue_Write_Index++;
Tx_1_Queue_Write_Index &= TX_1_QUEUE_INDEX_MASK;
SCI1CTL3 &= ~TX_ACTION_ENA; //SCICTL3.3
if(Tx_1_Queue_Read_Index == Tx_1_Queue_Write_Index)
{
Tx_1_Queue_Full = TRUE;
}
SCI1CTL3 |= TX_ACTION_ENA; //SCICTL3.3
Tx_1_Queue_Empty = FALSE;
}
This line above should trigger the SCI TX interrupt: SCI1CTL3 |= TX_ACTION_ENA; //SCICTL3.3 - but it doesn't.
I implemented the same code for many other microcontrollers w/o problems.
Thanks,
Marius Raducanu
