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TMS570LC4357: How to disable PBIST controller?

Max Wittekind
Expert 1895 points

Part Number: TMS570LC4357

Hello Hercules Support-Team,

I have a question regarding the documentation oft Memory Self-Test Global Control Register in the Technical Reference manual (spnu563a).

In Section 2.5.20 the MSTGENA bits are listed as the Memory self-test controller global enable key.

 
(Q1) In the Note the value Ah is recommended to disable the PBIST controller although the value Ah is previously mentioned as the value that enables the controller. Is this a documentation failure?


Thank you and best regards,

Max

  • 0
    TI__Mastermind 49120 points

    Yes, the note in the bit-field description must say:

    Note: It is recommended that a value of 5h be used to disable the memory self-test
    controller. This value will give maximum protection from a bit flip inducing event that
    would inadvertently enable the controller.

    I will file a doc update request for this.

    Thanks.