Hi,
Our team has been encountering an issue after running for about 8 hours with successful regular I2C write/write-read/read transactions occurring every few seconds.
The issue shows up in an I2C write transaction to 0x23 where the TRX bit on the I2CMDR is set (as verified through a serial output) but the following is captured on a serial analyzer.
As you can see, the R/W bit is set signaling a READ which should not happen if the TRX bit is set.
Here is the intended transaction (captured a few seconds before this failure).
This bug can be reliably replicated after running the system for several hours. Based on the way our circuit is designed we are confident that it is the RM57 setting the R/W bit incorrectly.
Any help would be appreciated.
Best,
John King
Veo Robotics