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Tool/software: Code Composer Studio
I observed something strange with the branch instruction “B _c_int00" preset in the reset vector 0x0000000. This instruction successful execution and control transfer to _c_int00 function seems to be dependent on the location of _c_int00 function in Flash. In “Not working” case below, instruction “B _c_int00” execution is not happening and the PC is incrementing to the next instruction, which is “B Undefined Entry” in the reset vector. CPSR.Mode = 1011, Supervisor, in "Not working" case. Unable to conclude why “B _c_int00” instruction is not executing when the _c_int00 function location in Flash is as per “Not working” case below.
_c_int00 Address in Flash |
"B _c_int00" instruction at reset vector 0x00000000 |
0x0026F4DC |
Working |
0x0026F504 |
Working |
0x0026F57C |
Working |
0x0026F66C |
Working |
0x0026F76C |
Working |
0x0026F7fC |
Working |
0x0026F800 |
Working |
0x0026F808 |
Not working |
0x0026F80C |
Not working |
0x0026F810 |
Not working |
0x0026F824 |
Not working |
0x0026F86C |
Not working |
0x0026F9E8 |
Not working |
0x0026FAE8 |
Not working |
0x0026FBE8 |
Not working |
0x0026FC00 |
Not working |
0x0026FC08 |
Working |
0x0026FCE8 |
Working |
0x0026FDE8 |
Working |
0x0026FEE8 |
Working |
I would like to know what is the issue here? Is it a CCS issue? or silicon issue? or am I missing anything?
CCS Version: 9.3.0.00012
Compiler version: TI v18.12.4.LTS
Regards,
Vishwas HC
Hi Vishwas,
For Hercules microcontrollers, the location of the exception vector table address is 0x00000000. The start address of _c_int00 needs to be 64-bit aligned. Do you check the memory to make sure the _c_int00 is programed to the address defined in your exception vector table?
Hi Wang,
Yes, I did make sure address of the _c_int00 in Flash is as per table in my original post.
I verified in map file as well as by having a break point at "B _c_int00" and decoding the Branch instruction opcode. I verified the content of memory location in memory browser to make sure _c_int00 location in Flash is as per my table above. As I explained in my original post Branch to _c_int00 from the reset vector is not happening in "Not working" cases. Flash address are correct and there is no overlap with any other section.
Regards,
Vishwas HC
Hi Vishwas,
Can you tell me how to program _c_int00() to the locations specified in your post? Isn't it aligned to 32-byte boundary?
Hi Wang,
I am assigning ROM start address for my application in linker cmd file as 0x00201504. I defined global constants variables to get _c_int00() into a specific location in Flash.
Initially when I defined some global constants, I observed behavior as explained in my above post for "Not working" case. Then I deleted some global constants and added more global constants in order to get _c_int00() location in Flash as per "Working" case.
Regards,
Vishwas HC
Hi Wang,
In my linker cmd file, align(32) for the Flash address is missing. I think, this is the reason for the issue I am observing. Thanks for your response. After adding align(32) for Flash, issue goes away.
As per documentation, align(32) directive aligns the Section Program Counter (SPC) at 32-byte boundary. However functions start address like 0x0026F504, 0x0026F57C, 0x0026F808 etc are not 32-byte aligned. With the align(32) in the linker cmd file, I do see many functions start address in the map file which are not 32-byte aligned.
I am not understanding why adding align(32) in the linker cmd file resolves the issue. With align(32) in linker cmd file, will linker allocate functions in Flash with 32 byte aligned?. What is the purpose of align(32) in the linker cmd file?
Regards,
Vishwas HC