TM4C123GH6PZ: Why is a data byte transmitted when slave address is NACKed?

Doug A

Part Number: TM4C123GH6PZ

While debugging my I2C master code, I observed that when I initiate a read or write to a slave that does not exist, the address byte is correctly NACKed (seen on oscilloscope and ADRACK is set in I2CMCS), but the data byte is still transmitted (also seen on oscilloscope). Is it correct behavior for a data byte to be transmitted if the slave address was NACKed?

over 4 years ago

0 Charles Tsai over 4 years ago

TI__Guru**** 191846 points

HI Doug,

The state machine might have started the data byte before seeing the NACK. The important thing is that the I2C master must generate a STOP condition after receiving the NACK to abort the current transfer. Do you see the STOP generated?

0 Doug A over 4 years ago in reply to Charles Tsai

Prodigy 70 points

Charles,

Yes, I see a STOP after the data byte is NACKed, although I expected the STOP to be generated after the address was NACKed. I do not think the I2C slave I am addressing will care that the data byte is transmitted if it NACKs its own address. My main concern is that I have configured the microcontroller's I2C registers correctly, which I think I have. Thanks for your help!

0 Charles Tsai over 4 years ago in reply to Doug A

TI__Guru**** 191846 points

Hi Doug,

Yes, you have configured the registers correctly.

Arm-based microcontrollers

Arm-based microcontrollers forum

TM4C123GH6PZ: Why is a data byte transmitted when slave address is NACKed?