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CCS/TMS570LS0714: How to activeate N2HET1[02]

Andrea Adamo
Intellectual 780 points
Part Number: TMS570LS0714


Tool/software: Code Composer Studio

Hello, I am new with this micro so the question could be easy. I want to activate pin 30 of this microcontroller which is N2HET1[02]. To activate a GPIO I use for example: gioSetBit(gioPORTA,ON_OFF,0);. What do I have to use if I want to activate N2HET1 pins in general? Or for example pin 32 MIBSPI5NCS?
In addition, It is possible to use CAN pins ad GIO? I have to use CAN3.

  • 0
    TI__Guru**** 198766 points

    Hello,

    1. NHET1[02] is multiplexed with other functional signals. But by default, this pin is used for NHET1[02].

    You can use GIO APIs for NHET signals: for example

    gioSetBit(hetPORT1, ON_OFF, 0); where hetPORT1 is defined in reg_het.h

    2. By the default, pin 32 is used as MIBSPI5NCS[0]. You can use GIO APIs for MibSPI too. For example:

    gioSetBit(mibspiPORT5, bit_index, value). Please refer to MIBSPI PCx registers for bit position for MibSPI signals

    3. CAN signals can be used as GIO. but you can not use GIO APIs. Please refer to section 24.13 of TRM

     

  • 0 in reply to QJ Wang
    Intellectual 780 points

    Thank you for the explanation. What is TRM? Where can I find some documentation for GIO APIs for NHET and GIO APIs for MibSPI?

  • 0 in reply to Andrea Adamo
    Intellectual 780 points

    My question is if I have to activate pin 30 which is defined as N2HET1[02] should I write:

    gioSetBit(hetPORT1, 2, 1);

    And if I want to activate pin 32 which is MIBSPI5NCS[0] should I write:

    gioSetBit(mibspiPORT5, 0, 1);

     

    Why is POR1 in N2HET1 and why is PORT5 in MIBSPI5NCS?

  • 0 in reply to Andrea Adamo
    Intellectual 780 points

    N2HET1 ports are working correctly as GPIO, but MIBSPI5 not. I am writing:

    /** bring MIBSPI1 out of reset */ //for SPI/MIBSPI, it is necessary to force the module out of reset
    mibspiREG1->GCR0 = 0U;
    mibspiREG1->GCR0 = 1U;

    gioSetBit(mibspiPORT5,VSR1,1);

    where VSR1 is #define VSR1 0 //index 0 del MIBSPI5, pin 32 micro

    The pin is always high.

    In addition, I am trying to change from Hacogen the MIBSPI5NCS[0] from SPI to GPIO, so I go to MIBSPI5 and subsection MIBSPI5 Port, but I can't find exactly the MIBSPI5NCS[0]. I also want to change from a pul up to a pull down.

    Moreover, I found this TMR where in section 16.15.29 is explained which bits I have to change to set CAN as GIO. I don't know where to change these bits. It is in can.c? Do you have some code examples?

    https://www.ti.com/lit/ug/spnu489c/spnu489c.pdf

  • 0 in reply to Andrea Adamo
    Intellectual 780 points

    I think I found where to change the code in the can.h library, just to do a test, but it seems it doesn't work. I changed the code with the corresponding bits as in TRM 24.17.30 and 24.17.31 but the RX bit is always low, and the TX pin is always high. I even tried with halchogen and I can see how the bits change in the code, but no changes happen in the electrical value of the pins.

    www.ti.com/.../spnu607a.pdf

    #define CAN3_TIOC_CONFIGVALUE    ((uint32)((uint32)0U  << 18U ) \
                                 |(uint32)((uint32)0U  << 17U ) \
								 |(uint32)((uint32)1U  << 16U )\
                                 |(uint32)((uint32)1U  << 3U ) \
                                 |(uint32)((uint32)1U  << 2U ) \
                                 |(uint32)((uint32)0U << 1U ))
#define CAN3_RIOC_CONFIGVALUE    ((uint32)((uint32)0U  << 18U ) \
                                 |(uint32)((uint32)0U  << 17U ) \
								 |(uint32)((uint32)1U  << 16U )\
                                 |(uint32)((uint32)0U  << 3U ) \
                                 |(uint32)((uint32)1U  << 2U ) \
                                 |(uint32)((uint32)0U << 1U ))

  • 0 in reply to Andrea Adamo
    TI__Guru**** 198766 points

    I don't suggest to use CAN_TX and CAN_RX pins as GIO. To use CAn_TX/RS as GIO, you need to:

    1. Set Init bit of CAN Control Register

    2. Clear the Func bit to zero to enable the GIO mode

    3. Configure Dir

    4. Write Out bit or read In bit in CAN TX/RX IO Control registers