This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP432P401R: Low Speed MCLK setting (Error -614 @ 0x0) persists with Emulation package 8.4.0.00006?

Part Number: MSP432P401R

Hello TI Devs,

This is a follow up question to the same issue in When

MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1);

is selected, subsequent attempts to load a new program through CCS fails with the error:

CS_DAP_0: Error connecting to the target: (Error -614 @ 0x0) The target indicates there is an error condition from a previous SWD  request. Clear the error the condition, and try the SWD request again. (Emulation package 8.4.0.00006) 

This is using the very simple SysTick example 

When the error occurs, simply unplugging and re-plugging in the USB cable corrects the issue. Using the DCOCLK source avoids the problem altogether. You can see both the low speed MCLK code (commented out) and the high speed MCLK code that avoids the problem below:

    /* Initializing MCLK to REFO (32kHz) causes BUG, use DCO 3MHz source */
    MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1);
    // MAP_CS_initClockSignal(CS_MCLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1);

    /* Configuring SysTick to trigger at 16000.
     */
    MAP_SysTick_enableModule();
    MAP_SysTick_setPeriod(1500000);     /* .5 sec w/high speed clock */
    // MAP_SysTick_setPeriod (16000);  //16000 .5 sec w/low speed clock
    MAP_SysTick_enableInterrupt();

Since the synchronization issue from the last question is approaching 3+ years old, I thought I would ask this follow-up and see if there had been any fixes put in place that I don't have? I have all the latest updates to CCS, but I'm on Linux if that makes any difference. The board is the MSP EXP432P401R Rev 2.1 (red)

  • Sorry for posting the wrong clock in the first part of the question. It is when `REFOCLK` is used as source, e.g.

    MAP_CS_initClockSignal(CS_MCLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1);

    that subsequent attempts to sync fail with the error. When the high freq DSOCLK is used, there are no sync problems. I have worked through a number of subsequent examples using all clock sources and can verify this bug. When MCLK is left in a low frequency by a program, all subsequent attempts to sync will fail until the USB cables is unplugged and re-plugged in.

  • I make a try. The problem is till remained.

    As this problem is related to MSP432P401 itself, if there is no change of IC design, the problem will not be fixed.

    I check the Errata, there is nothing about this phenomenon. I think it may because this problem will not affect the performance of the device, then it is ignored.

    If you have any concern, please let me know.

  • Thank you for confirming the issue. If it is a hardware issue -- then there is nothing to do. As long as you know the problem exists, there isn't any problem unplugging and re-plugging the cable to restore sync. It's just a bit disconcerning to attempt to sync and having the error pop-up.

    Maybe a comment could be added to the error message in CCS for the MSP432 something to the effect:

    "If MCLK is set to a low-frequency clock, unplug/replug the cable and try again."


    Quick and easy way of informing the user. Thanks again for testing.