TM4C1294KCPDT: Issue with File Inclusion for Ethernet interface

R & D

WE are facing issue with LWIP file while compiling code. it shows error

Description Resource Path Location Type
unresolved symbol lwIPInit, first referenced in ./main.obj TRY C/C++ Problem

#include <stdbool.h>
#include <stdint.h>

#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_adc.h"
#include "inc/hw_types.h"
#include "inc/hw_udma.h"
#include "inc/hw_emac.h"
#include "driverlib/debug.h"
#include "driverlib/gpio.h"
#include "driverlib/interrupt.h"
#include "driverlib/pin_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/uart.h"
#include "driverlib/adc.h"
#include "driverlib/udma.h"
#include "driverlib/emac.h"
#include "driverlib/flash.h"
//#define TARGET_IS_BLIZZARD_RB1
#include "driverlib/rom.h"
//#include "eth_client.h"
//#include "utils/lwiplib.h"



#define IPADDR_USE_STATIC       0
#define IPADDR_USE_DHCP         1
#define IPADDR_USE_AUTOIP       2


//#define FLASH_BASE_ADDR         ((volatile uint32_t*)0x00020000)
#define FLASH_BASE_ADDR         ((uint32_t*)0x00020000)

#define ADC_SAMPLE_BUF_SIZE (128)

uint32_t udmaCtrlTable[1024] __attribute__ ((aligned(1024)));
uint32_t ADC_OUT_1[8],ADC_OUT_2[8];

uint32_t pui32Data[2];
//uint32_t ui32SysClock,ui32Config,ui32ClockDiv ;

void UARTSend(const uint8_t *pui8Buffer, uint32_t ui32Count);
void InitUART0();
void initEthernet();
int i;

  void ADCSeq0Handler(void)
  {
      //
      // Clear the Interrupt Flag.
      //
      ADCIntClear(ADC0_BASE, 0);
   //   uint32_t ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0);
      if(  uDMAChannelModeGet(UDMA_CHANNEL_ADC0|UDMA_PRI_SELECT) == 0)
      {
          uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO0), ADC_OUT_1,8);
          //uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO0), ADC_OUT_1, 8);
          uDMAChannelEnable(UDMA_CHANNEL_ADC0|UDMA_PRI_SELECT);
      }
      if(  uDMAChannelModeGet(UDMA_CHANNEL_ADC0|UDMA_ALT_SELECT) == 0)
      {
          uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO0),ADC_OUT_2,8);
          uDMAChannelEnable(UDMA_CHANNEL_ADC0|UDMA_ALT_SELECT);
      }


      //uDMAChannelEnable(UDMA_CHANNEL_ADC0);
     //uDMAChannelRequest(UDMA_CHANNEL_ADC0);
  }

  void InitUDMA(void)
  {


          uDMAEnable(); // Enables uDMA
          uDMAControlBaseSet(udmaCtrlTable);
          //IntEnable(INT_UDMA);
          uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC0, UDMA_ATTR_ALL);

          // Configures the base address of the channel control table. Table resides in system memory and holds control
              //     information for each uDMA channel. Table must be aligned on a 1024-byte boundary. Base address must be
              //     configured before any of the channel functions can be used
          uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC0, UDMA_ATTR_USEBURST );


         uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_NEXT_USEBURST |UDMA_CHCTL_ARBSIZE_1);
         uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_NEXT_USEBURST |UDMA_CHCTL_ARBSIZE_1);

         uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO0), ADC_OUT_1, 8);
         uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO0),ADC_OUT_2,8);

         // uDMAChannelEnable(UDMA_CHANNEL_ADC0); // Enables DMA channel so it can perform transfers
         uDMAChannelEnable(UDMA_CHANNEL_ADC0);
         uDMAChannelRequest(UDMA_CHANNEL_ADC0);

         //IntEnable(INT_UDMA);
         //uDMAIntRegister(INT_UDMA,uDMAIntHandler);
         //IntMasterEnable();

         ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS0); // Enables ADC interrupt source due to DMA on ADC sample sequence 0
         IntEnable(INT_ADC0SS0);
         ADCIntRegister(ADC0_BASE,0,ADCSeq0Handler);
         IntMasterEnable();


  }

  void InitConsole(void)
  {
         SysCtlPeripheralReset(SYSCTL_PERIPH_ADC0);
         SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
         //SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1);
         SysCtlPeripheralReset(SYSCTL_PERIPH_UDMA);
         SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);

         SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
         GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
         GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_2);
         GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_1);
         GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0);

         SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
         GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0);
         GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_1);

         SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
         GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0);
         GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_1);


         ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 1);

         IntDisable(INT_ADC0SS0);
         ADCIntDisable(ADC0_BASE, 0);
         ADCSequenceDisable(ADC0_BASE, 0);

         //ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS0);
         ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_ALWAYS, 0);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 0, ADC_CTL_CH0);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 1, ADC_CTL_CH1);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 2, ADC_CTL_CH2);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 3, ADC_CTL_CH3);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 4, ADC_CTL_CH14);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 5, ADC_CTL_CH15);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 6, ADC_CTL_CH16);
         ADCSequenceStepConfigure(ADC0_BASE, 0, 7, ADC_CTL_CH17|ADC_CTL_END);

         ADCHardwareOversampleConfigure(ADC0_BASE, 64);
         ADCSequenceDMAEnable(ADC0_BASE, 0);
         ADCSequenceEnable(ADC0_BASE, 0);



  }

int main(void)
{

    uint32_t ui32SysClock;
   // ui32SysClock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |SYSCTL_OSC_MAIN|SYSCTL_USE_OSC ), 25000000);

    ui32SysClock = SysCtlClockFreqSet(SYSCTL_XTAL_25MHZ|SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_320,32000000);
    //uint32_t ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0);


    InitConsole();
   // ui32Config = ADCClockConfigGet(ADC0_BASE, &ui32ClockDiv);
    InitUDMA();
    InitUART0(ui32SysClock);

    pui32Data[0]=FLASH_BASE_ADDR[0];
    pui32Data[1]=FLASH_BASE_ADDR[1];
   // FlashErase(0x20000);


    initEthernet(ui32SysClock);

    while(1)
    {
        for(i=0;i<5;i++)
        {
            //UARTSend((uint8_t *)"1", 1);
           SysCtlDelay(ui32SysClock / 12);
           pui32Data[0] = 0x00000008;
           pui32Data[1] = 0x56789def;
           FlashProgram(pui32Data,(uint32_t)FLASH_BASE_ADDR,sizeof(pui32Data));
        }
        //ADCProcessorTrigger(ADC0_BASE, 0);
        //ADCIntClear(ADC0_BASE, 1);
        //ADCSequenceDataGet(ADC0_BASE, 0, pui32ADC0Value);
        //ADCSequenceDataGet(ADC1_BASE, 2, pui32ADC1Value);

        //uint32_t ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0);

    }
}


void UARTSend(const uint8_t *pui8Buffer, uint32_t ui32Count)
{
    //
    // Loop while there are more characters to send.
    //
    while(ui32Count--)
    {
        //
        // Write the next character to the UART.
        //
        UARTCharPutNonBlocking(UART0_BASE, *pui8Buffer++);
    }
}


void InitUART0(uint32_t clock)
{

    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

    GPIOPinConfigure(GPIO_PA0_U0RX);
    GPIOPinConfigure(GPIO_PA1_U0TX);
    GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
    UARTClockSourceSet(UART0_BASE,UART_CLOCK_SYSTEM);
    UARTConfigSetExpClk(UART0_BASE, clock, 115200,(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |UART_CONFIG_PAR_NONE));

}


void initEthernet(uint32_t sysclk)
{
    uint8_t pui8MACArray[8];
    uint32_t IpArray[4],subnet[4],Gateway[4];
          GPIOPinConfigure(GPIO_PF0_EN0LED0);
          GPIOPinConfigure(GPIO_PF4_EN0LED1);

          GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_0 | GPIO_PIN_4);

             pui8MACArray[0] = 0x01;
             pui8MACArray[1] = 0x02;
             pui8MACArray[2] = 0x03;
             pui8MACArray[3] = 0x01;
             pui8MACArray[4] = 0x02;
             pui8MACArray[5] = 0x03;


             IpArray[0]=192;
             IpArray[1]=168;
             IpArray[2]=5;
             IpArray[3]=5;

             subnet[0]=255;
             subnet[1]=255;
             subnet[2]=255;
             subnet[3]=0;

             Gateway[0]=192;
             Gateway[1]=168;
             Gateway[2]=5;
             Gateway[3]=1;


            lwIPInit(sysclk,pui8MACArray,(uint32_t)IpArray,(uint32_t)subnet,(uint32_t)Gateway,(uint32_t)IPADDR_USE_STATIC);
}

Please Help

Regards

Khodidas

over 5 years ago

0 Ralph Jacobi over 5 years ago

TI__Guru*** 135355 points

Hello Khodidas,

Well the lwIPInit function comes from the lwiplib utility provided, but you have the header file commented out in your code:

//#include "utils/lwiplib.h"

So you need to reinstate the include path for that file in order to get it to compile.

0 R & D over 5 years ago in reply to Ralph Jacobi

Intellectual 560 points

HI,

I have tested with #include "utils/lwiplib.h" also, still issue perist .

Regards

Khodidas

0 Ralph Jacobi over 5 years ago in reply to R & D

TI__Guru*** 135355 points

Hello Khodidas,

Is this a new project you made? If so, did you include the lwiplib.c file then?

If not, you need to add it to your project using the steps laid out in this E2E post: http://e2e.ti.com/support/microcontrollers/other/f/908/p/753675/2787705#2787705

0 R & D over 5 years ago in reply to Ralph Jacobi

Intellectual 560 points

HI,

Anyway, I moved to TI-RTOS with GNU compiler, and the required task is done and working.

may i will try your resolution later.

Thank you

Regards

Khodidas

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TM4C1294KCPDT: Issue with File Inclusion for Ethernet interface