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TMS570LC4357: handle GIO Interrupts independently

Roland Melad
Intellectual 1185 points
Part Number: TMS570LC4357


We are using TMS570LC4357 microcontroller for space applications where several digital input signals shall be handled through GIO interface. Each of these signals shall be treated using one different interrupt per single signal with different priorities, like this way:
- Signal 1 - ISR 1 - Priority 1
- Signal 2 - ISR 2 - Priority 2
...
- Signal n - ISR n - Priority n

Signal 1 ISR shall preempt Signal 2 ISR and Signal 2 ISR shall preempt Signal n but not in the opposite way, i.e. if ISR1 is being executed and before finishing its task ISR2 interrupts, ISR2 shall wait in a queue until ISR1 is finished, and after that ISR2 starts its execution. If ISR1 interrupts before ISR2 finish its tasks, ISR1 shall move out ISR2 and when ISR1 task ended, ISR2 shall be resumed.

Taking a look at your documentation (spnu563a) and examples, it seems that all GIO signals share the same two interrupts: GIO High & GIO Low, and it is under SW responsibility to manage the ISR mechanism, reading and writing the correspondent registers so, in principle, the SW shall manage the ISR instead of using microcontroller capabilities, so priority functionality become a very hard task for SW developers.

Can you please confirm our assumption?

  • 0
    TI__Guru**** 197426 points

    Hello Roland,

    You are right. There are only two priorities for all the GIO pins (High and Low). A single low-level-interrupt-handling block and a single high-level-interrupt-handling block service all of the GIO pins, but only one pin can be serviced by an interrupt block (low or high) at a time.

    In GIO interrupt service routine, you shall read the GIO offset register (GIOOFF1 or GIOOFF2, depending on high-/low-level interrupt) to find the pending interrupt GIO channel.