TMS570LC4357: Initialize CPU Registers

Ralph Neumann

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hello,

in the example source code from TI, generated with HalCoGen, the function _coreInitRegisters_ do the following:

; Switch to System Mode ( Shares User Mode registers ) (M = 11111)
cps #31
mov lr, r0
mrs r1,cpsr
msr spsr_cxsf, r1

but the documentation (ARM DDI 0460C) say, that in Systemand User Mode no SPSR Register exist.
Is there any special reason, why it is implemented in the TI Example Code?
What happens if the SPSR Register doesn't exist?

Best Regards

over 5 years ago

0 QJ Wang over 5 years ago

TI__Guru**** 200116 points

Hello Ralph,

Please refer to the answer in this thread:

0 Ralph Neumann over 5 years ago in reply to QJ Wang

Prodigy 165 points

Hello,

but the following thread

[Resolved] TMS570LS3137: HALCoGen startup code initializing SPSR in System Mode - Hercules™ safety microcontrollers forum - Hercules™ safety microcontrollers - TI E2E support forums

says:

mrs r1,cpsr
msr spsr_cxsf, r1

The above two lines can be removed when the CPU mode is System mode. So only the link register in system/user mode is initialized.

and your link says the lines cannot be commented as they are key to configuring the cores for operation.

what is the right solution now?
do i need this two lines or not?

Thanks!

Best Regards
Ralph

0 QJ Wang over 5 years ago in reply to Ralph Neumann

TI__Guru**** 200116 points

Hi Ralph,

Yes, the two lines below can be removed from the code generated by HALCoGen:

mrs r1,cpsr
msr spsr_cxsf, r1

Arm-based microcontrollers

Arm-based microcontrollers forum

TMS570LC4357: Initialize CPU Registers