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TMS570LS0914: ADC source impedance

Part Number: TMS570LS0914

A voltage divider is used to interface a signal (0 to 12V) to the mcu. The Thevenin equivalent of the voltage divider resistors is 8Kohm. The signal is a relatively slow changing signal and should be read once every 50 ms.

  1. After going through SPNA118B (ADC Source Impedance for Hercules™ ARM® Safety MCUs), I could not see any advantage to adding an external capacitor at the ADC input pin for the application I mentioned. But I am curious on what cases would a designer prefer to decrease the Csamp settling time for example from 5310nS to 89nS (fast switching between ADC channels) on the cost of adding 6820uS of delay for Cext recovery (much slower sampling rate is thus achievable because of the delay between the next cycle of channels acquisition). Am I missing something here and would it be better to add an external capacitor in my particular case?
  2. If for some reason, an external capacitor is needed, what are the recommendations on the capacitor selection and configuration(for example a configurations for fail safe) if the acquired analog signal is safety-critical?
  3. In SPNA118B, there is no mention about the effect of the leakage current on the charging/discharging of the capacitors at the ADC input pin nor about how the leakage current effects the accuracy of the ADC reading. As for the latter issue: The leakage current for this particular mcu is -4uA to 2uA for single channel ADC convertors and -9uA to 5uA for a shared channel being converted by both ADC converters. A leakage current of -9uA passing through a 20Kohm input impedance would cause an error of 180mV which is insane. The author of this document did a great job in making sure he had no more than 1/2 LSB error while reading ADC channels even with 20Kohm so how can we achieve high accuracy readings when considering the leakage current of the ADC pin?
  4. How are the results of SPNA118B (charging time and recovery time of capacitors) effected when taking into consideration the leakage current at the ADC input pin?

We also need some help in another issue but it is not suitable to discuss publicly at this forum. How can we contact the support team privately?

  • Hi HasMan,

    Please refer to the device datasheet: ADC electrical and timing specification table. 

  • Hi

    I am afraid you didn't understand my questions and concerns. I am not asking for any specs. In fact, the figures I mentioned are from this exact table you referred.

  • If the source impedance of the input circuit is big (for example 10kohms), the RC time constant is (10k+internal equivalent impedance)*13pF=(10k+0.5k)*13pF = 137ns. To get a correct sampled value, the sampling time has to be longer than 9*130ns = 1.2 us. 1.2us sampling time may be acceptable for some applications.

    If a big sampling time is not suitable for your application, The other way is to use an external capacitor as a charge reservoir. With a large external charge reservoir capacitor, you can use short sampling times (internal impedance * Csample). The advantage of this approach is that the external cap automatically charges up the sampling cap. The downside is that the time constant for external cap to be fully charged is much longer. This approach for fast changing input signal. 

    For this approach to work, you need to make sure the external capacitor is large enough so that the transient caused by its connection to the sampling capacitor is small, usually less than 1/2LSB. For a 10-bit ADC, the external capacitor should be 2048 * Csample. For 12-bit ADC, it should be 8192*Csample.

  • The best way is to put a simple RC filter on the op-amp output.

    Select a R and C so that by the end of the sampling period, the sampling capacitor has settled to within 1/2 an LSB of its final value. You also need to make sure there's enough resistance R so that the op-amp is stable. Many op-amps aren't stable with excessive capacitive loads.