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TMS570LC4357-EP: Power down procedure for unused peripherals.

Bartlomiej Gos
Prodigy 230 points
Part Number: TMS570LC4357-EP


One of the requirements in our project says that unused peripherals shall stay completely disabled, preferably powered down and with no clock signal routed in. This include I2C, ADC, N2HET, eCAP and others.

When reading the TRM I've noticed that there's a set of registers called "Peripheral Power-Down Set Register" (page 232 of the SPNU563A) .I'm unable to find any reference for exact usage of this register, so which bits correspond to which peripheral etc. My question is, am I correct to assume that this is the place where I can disable the peripherals we do not use? Where can I find the description of the procedure how it's done?

Thanks and regards,

Barte

  • 0
    TI__Guru**** 191906 points

    Hi,

      You will need to reference the datasheet to find out which bit of the Peripheral Power-Down Set Register corresponds to which peripheral. For example, you want to turn off the clock to the MibSPI5 to save power. The MibSPI5 is controlled by the memory select PS[0]. 

      

    Now let's look at the PSPWRDWNSET0 register. This is the Peripheral Pwer-Down Set register that controls PS0-PS7. So the PS[0] is controlled by the lower 4 bits of the PSPWRDWNSET0[3:0] while the PS[7] is controlled by PSPWRDWNSET0[31:28]. The reason that each PS is controlled by 4 bits is because some peripherals (not necessary in this device implementation) may share the same PS. In the case of MibSPI5, it occupies the 4 quadrants. 

      You will need to lookup the datasheet and find the PS[x] that the peripheral that you want to turn off and write to the corresponding PSPWRDWNSETx register of their respective register fields.