This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP432P401R: wake up signal time?

Part Number: MSP432P401R

Hi Team,

a customer has following questions on MSP432P401R:

  • What is the minimum signal time and voltage to wake up the MCU by GPIO pin in power modes LPM 3.5 and LPM 4.5?
  • What are the differences  between the pins, with and without a glitch filter?

Can you help answering those questions?

Thank you!

  • Hello,

    Stefan Lintner said:
    What is the minimum signal time and voltage to wake up the MCU by GPIO pin in power modes LPM 3.5 and LPM 4.5?

    The LPM3.5 and LPM4.5 Mode Transition Latencies can be found in Table 5-7 in the datasheet. This can be as high as 1.2 ms. The latch time for a pulse (edge-triggered) interrupt : 1 MCLK cycle (Section 2.2.2.1 in TRM). Latency from asserting the interrupt to execution of the first instruction of the ISR: 12 MCLK cycles (Section 1.5.8 in TRM). This does NOT account for the DCO startup time.

    Stefan Lintner said:
    What are the differences  between the pins, with and without a glitch filter?

    See Section 5.6 Glitch Filtering on Digital I/Os in the Technical Reference Manual (TRM).

    Regards,

    James