Hi,
We are trying to develop our own ethercat master. We came across two reference designs for ethercat master on the TI webiste
We wanted to understand which are the latest processors which TI suggests for developing a class A Ethercat master. It seems like TI is suggesting to use the Sitara range of processors but there are many options to choose from.
Which are the newest processors which we can use ?
Are there IDKs available for these processors?
Are there reference designs for implementing an ethercat master?
What document should we refer to start the design process?
Or should we just follow one of the two links I've shared to start the design process?
Some help regarding this would be greatly appreciated.
Thanks
Rohan