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TMS570LC4357: ADC Sampling rate in Continuous Conversions mode is slower then Single Conversion

enes ozer
Prodigy 40 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi.

I want to configure my ADC fast as i can. In datasheet minimum conversion time is 600 ns. My adc configurations are:

VCLK = 110MHz
ADCPrescaler = 3
Halcogen calculated Actual Cycle Time = 36.36 ns
ADC Channel selection is just 1 pin.
Halcogen calculated total sampling time = 800 ns

I toggle a pin when the program enter the ADC Group Memory Threshold Interrupt and measure that pin via a scope.

When i configure adc in continuous mode the measured frequency is 1.119 khz and total interrupts per second is 2238. My group memory is 64 word and fifosize is 64. As a result my sampling frequency is 1119 x 2 x 64 = 143232 and samplig period is 6981 ns.

When i configure adc in single conversion mode i restart conversion in ADC Group Memory Threshold Interrupt. 

The pin frequency is 8870 hz. Last the sampling period is 880 ns.

Why this two frequency different? 

I dont want use ADC Group Memory Threshold Interrupt in real application and i want use the ADC in Continuous conversion mode.
What i do wrong?

  • 0
    TI__Guru**** 199106 points

    Hi,

    In continuous mode, counter is incremented each time your code reads a conversion result from the results memory. If you read the conversion result in the ISR, the measurement might not be accurate.

  • 0 in reply to QJ Wang
    Prodigy 40 points

    I read conversion results with DMA. When i configure ADG1DMACR to G1_DMA_EN or DMA_G1_END there is no DMA transfer. But i configure DMA G1_BLK_XFER DMA transfers begins. The DMA Frame transfer count always same even i change G1_BLOCKS count. And i must be set OVR_G1_RAM_IGN bit in ADG1MODECR for DMA transfers begins.
     
    What extends the period in my situation? Cant DMA read ADC Result's Memory fast enough or ADC dont generate DMA request correct time?

  • 0 in reply to enes ozer
    TI__Guru**** 199106 points

    The OVR_G1_RAM_IGN is cleared by default, the ADC will not overwrite the contents of the G1 results' memory. I think the DMA transfer has not completed when the new ADC conversion data comes. 

    Please try a longer sampling time to check if your measurement is correct.

  • 0 in reply to QJ Wang
    TI__Guru**** 199106 points

    The gioToggleBit(..) function call will take 50 CPU clock cycles. If the GCLK is 300MHz, this function takes 1667ns which is twice of your ADC sampling time (800ns).

  • 0 in reply to QJ Wang
    TI__Guru**** 199106 points

    As mentioned before, the down-counter counts down from the G1_BLOCKS (64 in your setup) for each new conversion result, and is incremented each time your code reads the conversion result from the FIFO. The DMA request is generated whenever the counter transitions from +1 to 0. 

    1. When ADC has completed 64 conversions, a DMA request is generated and the threshold Interrupt is also generated. The ADC is in continuous conversion mode, so the conversions continue to happen

    2. If ADC converted one more channel before the DMA got to reading the first conversion result from the FIFO, counter will decrement to -1.

    3. DMA starts to read the conversion results one by one, and the counter increments for each read by the DMA

    4. If ADC writes another conversion result when the counter is 1, the counter transitions from +1 to 0 which will trigger another DMA request and threshold interrupt although there have not been 64 conversions since the last time that the DMA request and threshold interrupt were generated.

    This is why I asked you to use a longer sampling time for your measurement. 

    I suggest you use single conversion sequence that are periodically triggered using one of the several trigger options supported.

  • 0 in reply to QJ Wang
    Prodigy 40 points

    Thanks for your replies .

    I found why ADC slows. I measure the frequency with DMA FTC interrupt. But actually ADC conversion period does not change. The ADC DMA G1_BLOCKS counter is the problem. When set this counter first DMA request is true. But after DMA request the counter dont serviced to selected value and it is decrement from 512. So the DMA FTC interrupt occurs after 512 conversion. I must service the G1_BLOCKS at every FTC interrupt.

    After this solution i can get ADC Result's almost wanted frequency. My conversion speed is too fast and i lose 2 conversion result whlie i servicing G1_BLOCKS in FTC interrupt. If i set conversion speed slower value this problem not occurs but i must use fastest conversion speed and i think 2 conversion loss dont affect my application.

  • 0 in reply to QJ Wang
    Prodigy 40 points

    I think your calculation have an extra zero. If the function takes 50 CPU cycle, it is takes 166.7 ns. And i am sure this function dont affect my measuring method even i call this in ADC conversion end interrupt which occurs at 800ns period.

  • 0 in reply to enes ozer
    TI__Guru**** 199106 points

    Thanks Enes for sharing your finding. 

    The gioToggleBit(..) takes about 50 cpu clock cycles, but my calculation is wrong, it is 166.7ns rather than 1667ns.