We are running into a problem with the DMA BTC interrupts. We have two peripherals running on different MIBSPIs that each use DMA to transfer data to/from the peripheral. One of the two peripheral transfers is triggered asynchronously from an external source and the other one is triggered by our software, both use the DMA BTC interrupt to handle the data after a transfer. The problem is that due to the asynchronous nature, we have some rare occasions where both BTC interrupts trigger at the exact same time, and because it is the from the same interrupts source the interrupt is not qeued and we end up losing one of the two interrupts (it seems to always be the one with lower DMA priority).
Is there any way to deal with this problem and prevent losing an interrupt? We have tried reading the various DMA registers to see if we can check if multiple interrupts have occurred but haven't been successfull so far. We are adding additional peripherals with asynchronous DMA in the future so would prefer a general solution that also works for more than two conflicting interrupts.
