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Original question:

TMS320F28388D: How to avoid the jitter when EPWMxSYNCO source is set to CTR = 0.

TMS320F28388D: When (CA=0;CB=TBPRD) or (CA=TBPRD;CB=0) in up-count mode.

Wenjing
Prodigy 140 points

Part Number: TMS320F28388D

Hi,

My basic PWM Configuration is like the screenshot.
I tried to generate full high/low level PWM by setting (CA=0;CB=TBPRD)/(CA=TBPRD;CB=0) in up-count mode of the TBCTR.
As a result, one PWM TBCLK pulse occurred for each PWM cycle.
To avoid this pulse, I set (CA=0;CB=TBPRD+1)/(CA=TBPRD+1;CB=0) and confirmed that it works fine.
Is my solution okay?

I really appreciate your support.

Wenjing