TMS320F280049: About XBAR delay

So in general, the delay from the XBARs are unknown. The EPWM module, once it receives the SYNC pulse can take 1 or 2 cycles to load TBPHS and that depends on the EPWM clock relationship with SYSCLK.

Frank Ankapong can you comment on the 2nd question?

Nima

Hi Chen,

On your 2nd question, this delay is asynchronous and not cycle based. There will be some variance from device to device but the maximum is specified in the datasheet as cmpss response time.

Frank,

I know the CMPSS response time, but i want to know the XBAR delay for CMPSS output high to GPIO  output high.

Nima,

We cannot say the delay from the XBARs are unknown.

Customer want to know the XBAR delay for system design.

If the delay is not the fixed, please advise the MIN to Max delay SYSCLK.

Let me see what I can find.

Chen,

The CMPSS response time is already inclusive of output x-bar and epwm x-bar delays. It measures from input pin to output pin. You can't access the CMPSS output directly so this is the only meaningful measurement.

Nima,

Please advise the time line!