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TMS320F28075: [ERROR] C28xx_CPU1: File Loadrer: Verification failed: Memory map prevented reading 0x7821C @Program

O.H
Mastermind 6670 points
Part Number: TMS320F28075
Other Parts Discussed in Thread: UNIFLASH, TMDSEMU200-U, C2000-GANG, C2000WARE

Hi experts,

My customer is using UNIFLASH (v6.1.0.2829) and TMDSEMU200-U and is getting an error on "Verify Image" after a successful write.

  • Load Image  -> [SUCCESS] Program Load completed successfully.
  • Verify Image -> [ERROR] C28xx_CPU1: File Loadrer: Verification failed: Memory map prevented reading 0x7821C @Program

I referred to the following thread as a countermeasure for the error content.

  1. Uniflash: Memory map prevented reading 0x7801C@Program
  2. Verification failed: Values at address 0x84330@Program do not match Please verify target memory and memory map
  • Reset the target -> [INFO] Executing Reset: CPU Reset.  -> However, an error occurs.
  • Check the contents of "0x7821C" -> FFFF, and confirm that it is the Reserved area from TRM.

"Contents of Setting"

The model number of the device is different, but I used F280049CLaunchPad and wrote the sample code for GPIO. The writing was successful and Verify Image succeeded as is (without reconnecting or resetting the device). Therefore, we have asked our customers to check what happens when they use the sample code.

Any advice on how to avoid the error or what I should investigate would be appreciated.

Best regards,
O.H

  • 0
    TI__Guru* 87155 points

    Hi,

    Is customer programming the password as part of the image?  If yes, they need to unlock the device before they can do a standalone verify.

    Please check.

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    Mastermind 6670 points

    Hi Vamsi,

    Thank you for your reply.

    Vamsi Gudivada said:
    Is customer programming the password as part of the image?  If yes, they need to unlock the device before they can do a standalone verify.

    Except for Z2-BOOTCTRL, all of them (LINKPOINTER, OPTSECLOCK, Z1-OTPBOOTCTRL, CSMPSWD, GRABSELECT/RAM, EXEONLYSECT/RAM) are set to 0xFFFFFFF (Reserved contains 0 or F). So we assume that the security function is turned off.

    Also, since the value of 0x7821C is actually readable, we believe that the password is not necessary.

    Best regards,
    O.H

  • 0 in reply to O.H
    TI__Guru* 87155 points

    Hi O.H,

    You said you are using F28004x.  Default values for passwords are not all 1s (0xFFFFFFFF) on this device.  Please check.

    If customer is not using F28004x and still observed the above issue in F28075, then please check to make sure whether the memory is accessible or not (if it all shows up as 0s, then it is locked).

     Based on your reply, I will ask our security expert to take a look at this.

    Thanks and regards,

    Vamsi 

  • 0 in reply to Vamsi Gudivada
    Mastermind 6670 points

    Hi Vamsi Gudivada,

    Sorry, forget about the F28004x, we just tested it ourselves.

    Once again, the customer is using F28075. The results of the Memory Browser are attached below. Some of the values are "0000", but basically it seems to be readable.

    Best regards,
    O.H

  • 0 in reply to O.H
    TI__Guru* 87155 points

    Hi O.H,

    Thank you for the clarification and the images.

    I assigned this to our security expert for review.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    TI__Guru* 87155 points

    Hi O.H,

    Could you share the screenshots for DCSM OTP content (for both zones)?

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Mastermind 6670 points

    Hi Vamsi Gudivada,

    Thank you for assigning this to security expert.

    The results of the survey were shared with us by a customer and are described below.

    "Check if Verify can be executed in UniFlash"

    • [Contents]
      They have Verified "the sample code" and the "application code created by the customer" with UniFlash and C2000-GANG. For each of them, they compared four patterns of writing the OTP area in hex.

      (1) Sample code: No OTP area written (no change) *Attachment: gpio_toggle_cpu01.hex)
      (2) Sample code: OTP is written *Attachment: gpio_toggle_cpu01_change.hex)
      (3) Customer program: OTP is written (original code used by the customer)
      (4) Customer program: No OTP area written (Deleted from the original code)

    • [Result]
      (1) SUCCESS, (2) ERROR, (3) ERROR, (4) SUCCESS.

    • [Consideration]
      The difference between SUCCESS and ERROR seems to be caused by the presence or absence of a code related to the writing of 0x5857FF5A in Z2-BOOTCTRL (0x7821E) in the OTP area.

    • [Contents of the OTP write location].
      :02000000040007F3
      :08821C00FFFFFFFFFF5A585756

    • [About the write file]
      Build with CCSv9 and create a hex file with --intel hex format. In the Summary of Flags set in Project Properties>C2000 HEX Utility, "--memwidth=16 --romwidth=16 --intel" is listed.

    "Comparison of C2000-GANG and UniFlash (Part 1)"

    • After writing the above programs (1) to (4) with C2000-GANG, they verified them with C2000-GANG.

    • [Result]
      SUCCESS was achieved in all cases (1) to (4).

    "Comparison of C2000-GANG and UniFlash (Part 2)"

    • After writing the programs (1) to (4) with Uniflash, Verify was performed with C2000-GANG.

    • [Result]
      SUCCESS was achieved for all programs (1) to (4).

    "Question"

    • There are four things they would like to confirm from the above results.

      1. Difference between C2000-GANG and UniFlash VerifyImage (Is there any compatibility between C2000-GANG Verify and UniFlash Verify?)
      2. The difference between "VerifyImage" and "Verify Flash after Program" in the Download Settings of Uniflash.
      3. Why can't they Verify with UniFlash if there is writing in the OTP area? (READ MEMORY can do it)
      4. Is there any way to verify with UniFlash even if there is writing in the OTP area?

    "Version information"

    • [CCS]
      Code Composer Studio Version : 9.1.0.00010
      Compiler ver : TI v18.12.2.LTS
      C2000Ware : 2.00.00.02

    • [C2000-GANG]
      GUI-software ：G28x:01.01.02.00
      DLL ：D280:01.01.02.00

    • [UniFlash]
      6.1.0.2829

    • [Sample code]
      C:\ti\c2000\C2000Ware_2_00_00_02\device_support\f2807x\examples\cpu1\gpio_toggle
    Vamsi Gudivada said:
    Could you share the screenshots for DCSM OTP content (for both zones)?

    The contents of Zone 1 (= 0x78000 - 0x781F0) and Zone 2 (0x78200 - 0x783F0) are attached below.
    (Are the areas to be captured correct...?)

    Best regards,
    O.H

    Fullscreen gpio_toggle_cpu01.hex.txt Download 
    :020000040008F2
:0400000000482D1176
:20200000FFFFA80000000001FFFEA802000000000000FFFEA804000000000000FFFEA8061E
:1420100000002E400008FFFEA80800002E4000080000000023
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    Fullscreen gpio_toggle_cpu01_change.hex.txt Download 
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  • 0 in reply to O.H
    TI__Guru* 87155 points

    OH,

    Just to summarize:  Data got programmed in to OTP as needed (in both Uniflash and C2000-GANG cases).  C2000-GANG is able to verify it successfully.  But Uniflash failed to verify that.  And the only field that is programmed in the DCSM OTP is Z2-BOOTCTRL.

    Did I get that correct?

    Please ask for the OTP dump.

    Also, can they send the file through which they assigned value to the Z2-BOOTCTRL?

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    TI__Guru* 87155 points

    OH,

    As you can see, this is not a flash program error.  This is a read error.

    I discussed this with our CCS team.  Gel file's memory map defined the OTP space in the data page.  Hence, the memory map is not allowing the reads at the failing OTP address on the Program page.  To avoid this, you can suggest the customer to map the OTP data to data page in the linker cmd file and see if that helps.  

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    Mastermind 6670 points

    Hi Vamsi Gudivada,

    Sorry for the late reply. And thanks for the support.

    Vamsi Gudivada said:

    Just to summarize:  Data got programmed in to OTP as needed (in both Uniflash and C2000-GANG cases).  C2000-GANG is able to verify it successfully.  But Uniflash failed to verify that.  And the only field that is programmed in the DCSM OTP is Z2-BOOTCTRL.

    Did I get that correct?

    Yes. You are right.

    Vamsi Gudivada said:

    Please ask for the OTP dump.

    Also, can they send the file through which they assigned value to the Z2-BOOTCTRL?

    Do you want me to run Memory Browser's Export and extract "The contents of Zone 1 (= 0x78000 - 0x781F0) and Zone 2 (0x78200 - 0x783F0)" instead of a screenshot?  If the problem persists after implementing the workaround, I would like to ask the customer for help.

    The file uses the previous "gpio_toggle_cpu01_change.hex" above. The first two lines of the file contain the addition of Z2-BOOTCTRL.

    Vamsi Gudivada said:

    As you can see, this is not a flash program error.  This is a read error.

    I discussed this with our CCS team.  Gel file's memory map defined the OTP space in the data page.  Hence, the memory map is not allowing the reads at the failing OTP address on the Program page.  To avoid this, you can suggest the customer to map the OTP data to data page in the linker cmd file and see if that helps. 

    I have asked you to change the linker command file. I will let you know the result later.

    Let me confirm the above explanation: I have confirmed that Zone 2 (0x78200 - 0x783F0) is defined in the data area in the Gel file (f28075.gel). I confirmed that nothing is defined in the default settings of the linker. However, from the Uniflash Memory Browser, I was able to read the OTP even though its contents were written.
    Could you please provide additional explanation as to why they are able to read from the Memory Borwser, but not allowed to read in Verify?

    O.H said:
    1. Difference between C2000-GANG and UniFlash VerifyImage (Is there any compatibility between C2000-GANG Verify and UniFlash Verify?)
    2. The difference between "VerifyImage" and "Verify Flash after Program" in the Download Settings of Uniflash.

    Also, could you tell me about the above question?

    1. The simple interpretation is that the algorithm of Verify is different? Or does it mean that the Flash content can be Verified because the target configuration file is not used (i.e. Gel file is not used) in C2000-GANG?

    2. Does this mean that when the "Load image", Uniflash is automatically informed that Zone 2 (0x78200 - 0x783F0) is the data area, and as a result Verify succeeds?

    Best regards,
    O.H

  • 0 in reply to O.H
    TI__Guru* 87155 points

    Hi O.H,

    1. A screen shot and the export - both help.  

    2. In Uniflash memory window, they can change between the data and program pages.  For Uniflash standalone memory read (Verify image), we (C2000) do not deliver any code.  We deliver code only for the flash-specific verify (this uses flash API and is tied to "Verify Flash after program").  I believe the CCS/Uniflash memory read algos check for the page in which they are allowed to be read (I can enquire and confirm if needed).  This verify is not tied to flash wrapper.  It simply reads any memory (RAM or ROM or Flash) and compares it against the provided image.      

    3. Uniflash standalone "verify image" option: As explained above, this option does not invoke the Flash algorithms from Flash tool and hence any system/Flash initialization will not happen - which can cause Flash read issues. 

    GANG SW does not use the TI CCS/Uniflash algos or the gel file for memory reads.  It is a 3rd party tool.  It uses the flash API for verify.

    Verify Flash after Program:  This is not standalone.  This requires a program operation as a prerequisite.  And this verify uses the flash API algos.  Also, this means that device and flash (wait-states, power mode etc.) are initialized before this verify.  Hence, device would be in a good initialized state. 

    When a program load to flash is initiated, Uniflash programs and verifies immediately after the program operation.  

    If my previous suggestion (changing the page in linker) does not help, here are couple of things they can try:  

    1. Do a checksum (in plugin) test before the verify.  This invokes the flash tool to initialize the flash for reads.

    2. Disable "Run Target after program load" option if it is enabled.  If they are not doing an program operation, this may not make any difference.  When this is disabled, CPU will not execute the programmed code after program - this keeps the device in known initialized state after the program operation.  This helps to remove any effect on the device from the application execution.

    3. Try enabling the "Keep the core connected" option.  After a flash program or erase or flash-API based verify operation, the core will not get disconnected with this option enabled.  That way, flash is in initialized state and hence standalone verify will get the benefit. However, if they are not doing any program operation, this may not help.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Mastermind 6670 points

    Hi Vamsi Gudivada,

    The customer has confirmed that "Verify image" succeeds by changing the contents of the linker command file. Attached are the linker command files before and after the change.

    However, they only have a board that has already been rewritten by their program, so when they check the OTP area, they can only get the values that have been set. I asked the customer to extract the data in TI-TXT format, but he said it was the same as the information on the Memory Browser screen that I attached before.

    In the hex file generated by modifying the linker command file, there is no description of going to write 0x5857FF5A to the OTP address (0x7821E). (*1) Therefore, we assume that the OTP function has not been set up. The same program as the previous one (4) is generated.

    (*1) Check by grep in hex with FF5A5857, referring to the description of the relevant two lines (below). The two lines can be found in the attached file "gpio_toggle_cpu01_cahnge.hex".
    :020000040007F3
    :08821C00FFFFFFFFFF5A585756

    O.H said:
    (4) Customer program: No OTP area written (Deleted from the original code)

    In other words, they have mapped the OTP address to be the data page, but there is no code in hex to write to the OTP area, so I assume that Verify is successful.

    Is the above guess correct?

    Best regards,
    O.H

    Fullscreen before.cmd.txt Download 
    /* this linker command file is to be included if user wants to use the DCSM feature on the device
 * DCSM  means Dual Zone Code Security Module.
 * This linker command file works as an addendum ot the already existing Flash/RAM linker command file
 * that the project has.
 * The sections in the *_ZoneSelectBlock.asm source file is linked as per the commands given in the file
 * NOTE - please note fill=0xFFFF, this helps if users include this file in the project by mistake and
 * doesn't provide the needed proper *_ZoneSelectBlock.asm sources .
 * Please refer to the Blinky DCSM example in the controlsuite examples for proper usage of this.
 *
 * Once users are confident that they want to program the passwords in OTP, the DSECT section type can be removed.
 *
*/

MEMORY
{
PAGE 0 :  /* Program Memory */

   /* Z1 OTP.  LinkPointers */
   DCSM_OTP_Z1_LINKPOINTER   : origin = 0x78000, length = 0x00000C
   /* Z1 OTP.  PSWDLOCK/RESERVED */
   DCSM_OTP_Z1_PSWDLOCK	    : origin = 0x78010, length = 0x000004
   /* Z1 OTP.  CRCLOCK/RESERVED */
   DCSM_OTP_Z1_CRCLOCK	    : origin = 0x78014, length = 0x000004
   /* Z1 OTP.  RESERVED/BOOTCTRL */
   DCSM_OTP_Z1_BOOTCTRL	    : origin = 0x7801C, length = 0x000004

   /* DCSM Z1 Zone Select Contents (!!Movable!!) */
   /* Z1 OTP.  Z1 password locations / Flash and RAM partitioning */
   DCSM_ZSEL_Z1_P0	        : origin = 0x78020, length = 0x000010

   /* Z2 OTP.  LinkPointers */
   DCSM_OTP_Z2_LINKPOINTER	: origin = 0x78200, length = 0x00000C
   /* Z2 OTP.  GPREG1/GPREG2 */
   DCSM_OTP_Z2_GPREG	        : origin = 0x7820C, length = 0x000004
   /* Z2 OTP.  PSWDLOCK/RESERVED */
   DCSM_OTP_Z2_PSWDLOCK	    : origin = 0x78210, length = 0x000004
   /* Z2 OTP.  CRCLOCK/RESERVED */
   DCSM_OTP_Z2_CRCLOCK	    : origin = 0x78214, length = 0x000004
   /* Z2 OTP.  GPREG3/BOOTCTRL */
   DCSM_OTP_Z2_BOOTCTRL	    : origin = 0x7821C, length = 0x000004

   /* DCSM Z1 Zone Select Contents (!!Movable!!) */
   /* Z2 OTP.  Z2 password locations / Flash and RAM partitioning  */
   DCSM_ZSEL_Z2_P0	        : origin = 0x78220, length = 0x000010

}

SECTIONS
{
   dcsm_otp_z1_linkpointer 	: > DCSM_OTP_Z1_LINKPOINTER		PAGE = 0, type = DSECT
   dcsm_otp_z1_pswdlock		: > DCSM_OTP_Z1_PSWDLOCK		PAGE = 0, type = DSECT
   dcsm_otp_z1_crclock		: > DCSM_OTP_Z1_CRCLOCK			PAGE = 0, type = DSECT
   dcsm_otp_z1_bootctrl		: > DCSM_OTP_Z1_BOOTCTRL		PAGE = 0, type = DSECT
   dcsm_zsel_z1				: > DCSM_ZSEL_Z1_P0				PAGE = 0, type = DSECT

   dcsm_otp_z2_linkpointer	: > DCSM_OTP_Z2_LINKPOINTER		PAGE = 0, type = DSECT
   dcsm_otp_z2_pswdlock		: > DCSM_OTP_Z2_PSWDLOCK		PAGE = 0, type = DSECT
   dcsm_otp_z2_crclock		: > DCSM_OTP_Z2_CRCLOCK			PAGE = 0, type = DSECT
   dcsm_otp_z2_bootctrl		: > DCSM_OTP_Z2_BOOTCTRL		PAGE = 0
   dcsm_zsel_z2				: > DCSM_ZSEL_Z2_P0				PAGE = 0, type = DSECT
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/
    Fullscreen after.cmd.txt Download 
    /* this linker command file is to be included if user wants to use the DCSM feature on the device
 * DCSM  means Dual Zone Code Security Module.
 * This linker command file works as an addendum ot the already existing Flash/RAM linker command file
 * that the project has.
 * The sections in the *_ZoneSelectBlock.asm source file is linked as per the commands given in the file
 * NOTE - please note fill=0xFFFF, this helps if users include this file in the project by mistake and
 * doesn't provide the needed proper *_ZoneSelectBlock.asm sources .
 * Please refer to the Blinky DCSM example in the controlsuite examples for proper usage of this.
 *
 * Once users are confident that they want to program the passwords in OTP, the DSECT section type can be removed.
 *
*/

MEMORY
{
PAGE 0 :  /* Program Memory */

   /* Z1 OTP.  LinkPointers */
   DCSM_OTP_Z1_LINKPOINTER   : origin = 0x78000, length = 0x00000C
   /* Z1 OTP.  PSWDLOCK/RESERVED */
   DCSM_OTP_Z1_PSWDLOCK	    : origin = 0x78010, length = 0x000004
   /* Z1 OTP.  CRCLOCK/RESERVED */
   DCSM_OTP_Z1_CRCLOCK	    : origin = 0x78014, length = 0x000004
   /* Z1 OTP.  RESERVED/BOOTCTRL */
   DCSM_OTP_Z1_BOOTCTRL	    : origin = 0x7801C, length = 0x000004

   /* DCSM Z1 Zone Select Contents (!!Movable!!) */
   /* Z1 OTP.  Z1 password locations / Flash and RAM partitioning */
   DCSM_ZSEL_Z1_P0	        : origin = 0x78020, length = 0x000010

   /* Z2 OTP.  LinkPointers */
   DCSM_OTP_Z2_LINKPOINTER	: origin = 0x78200, length = 0x00000C
   /* Z2 OTP.  GPREG1/GPREG2 */
   DCSM_OTP_Z2_GPREG	        : origin = 0x7820C, length = 0x000004
   /* Z2 OTP.  PSWDLOCK/RESERVED */
   DCSM_OTP_Z2_PSWDLOCK	    : origin = 0x78210, length = 0x000004
   /* Z2 OTP.  CRCLOCK/RESERVED */
   DCSM_OTP_Z2_CRCLOCK	    : origin = 0x78214, length = 0x000004
   /* Z2 OTP.  GPREG3/BOOTCTRL */
/*   DCSM_OTP_Z2_BOOTCTRL	    : origin = 0x7821C, length = 0x000004*/

   /* DCSM Z1 Zone Select Contents (!!Movable!!) */
   /* Z2 OTP.  Z2 password locations / Flash and RAM partitioning  */
   DCSM_ZSEL_Z2_P0	        : origin = 0x78220, length = 0x000010
   
PAGE 1 :

   /* Z2 OTP.  GPREG3/BOOTCTRL */
   DCSM_OTP_Z2_BOOTCTRL	    : origin = 0x7821C, length = 0x000004

}

SECTIONS
{
   dcsm_otp_z1_linkpointer 	: > DCSM_OTP_Z1_LINKPOINTER		PAGE = 0, type = DSECT
   dcsm_otp_z1_pswdlock		: > DCSM_OTP_Z1_PSWDLOCK		PAGE = 0, type = DSECT
   dcsm_otp_z1_crclock		: > DCSM_OTP_Z1_CRCLOCK			PAGE = 0, type = DSECT
   dcsm_otp_z1_bootctrl		: > DCSM_OTP_Z1_BOOTCTRL		PAGE = 0, type = DSECT
   dcsm_zsel_z1				: > DCSM_ZSEL_Z1_P0				PAGE = 0, type = DSECT

   dcsm_otp_z2_linkpointer	: > DCSM_OTP_Z2_LINKPOINTER		PAGE = 0, type = DSECT
   dcsm_otp_z2_pswdlock		: > DCSM_OTP_Z2_PSWDLOCK		PAGE = 0, type = DSECT
   dcsm_otp_z2_crclock		: > DCSM_OTP_Z2_CRCLOCK			PAGE = 0, type = DSECT
   dcsm_otp_z2_bootctrl		: > DCSM_OTP_Z2_BOOTCTRL		PAGE = 1
   dcsm_zsel_z2				: > DCSM_ZSEL_Z2_P0				PAGE = 0, type = DSECT
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

  • 0 in reply to O.H
    TI__Guru* 87155 points

    Hi OH,

    Please confirm whether I got your correctly or not:  After changing the memory definition to page 1, verify succeed but the corresponding data is missing in the image (and hence it won't make it in to the OTP).  Did I get that correct? 

    If yes, I may have to loop in our compiler team to know why the data is missing in the output.  Please confirm.

    Note: You can edit the gel file to add OTP in page 0. This will allow OTP reads in page 0.

    Please note: I will not be available for the next two weeks.  I will assign this to another expert that can help you further.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Mastermind 6670 points

    Hi Vamsi Gudivada,

    Vamsi Gudivada said:
    Please confirm whether I got your correctly or not:  After changing the memory definition to page 1, verify succeed but you the corresponding data is missing in the image (and hence it won't make it in to the OTP).  Did I get that correct? 

    Yes, that's right.

    Thanks for assigning me to another expert.

    Best regards,
    O.H

  • 0 in reply to O.H
    TI__Guru**** 472441 points

    Hello O.H.

    This thread has been assigned to our UniFlash expert for continued discussion.

    Thanks

    ki

  • 0 in reply to O.H
    TI__Genius 13105 points

    O.H,

    Can you summarize the current issue again for me? I tried reading through the thread, but I'm still not sure what the remaining issue is.

    The customer recompiled their program so that the OTP data is now programmed to page1 instead of page0. And when they load this program, it doesn't actually write the OTP?

    Thanks,

    Ricky

  • 0 in reply to Ricky Lau
    Mastermind 6670 points

    Hello Ki, Ricky Lau,

    Thanks to both of you for your help.

    Ricky Lau said:
    Can you summarize the current issue again for me? I tried reading through the thread, but I'm still not sure what the remaining issue is.

    The problem is that the code does not include what to write to the OTP.

    The original problem resulted in the following using a hex file that contained what to write to the OTP.

    • Load Image  -> [SUCCESS] Program Load completed successfully.
    • Verify Image -> [ERROR] C28xx_CPU1: File Loadrer: Verification failed: Memory map prevented reading 0x7821C @Program

    The customer recompiled their program so that the OTP data is now programmed to page1 instead of page0. Using the modified hex file, the "Load Image" and "Verify Image" passed for the board that had already been written.

    However, since the OTP has already been written, we cannot determine if the OTP has been rewritten. It seems that the code does not contain any content to be written to the OTP.

    O.H said:
    Check by grep in hex with FF5A5857, referring to the description of the relevant two lines (below). The two lines can be found in the attached file "gpio_toggle_cpu01_cahnge.hex".
    :020000040007F3
    :08821C00FFFFFFFFFF5A585756

    Best regards,
    O.H

  • 0 in reply to O.H
    TI__Genius 13105 points

    O.H,

    Is the hex file only used for looking at the sections being written, or is customer planning to use it for programming devices as well?

    Hex format do not have concept of pages, so I wondering if the hex file was generated to only including the data on page0 and therefore it did not include the data written to 0x7821C on page1.

    If you have the .out file, you can generate the Object File Dump (ofd) information to confirm that it is writing to the 0x7821C section.

    Thanks,

    Ricky

  • 0 in reply to Ricky Lau
    Mastermind 6670 points

    Hi Ricky,

    Ricky Lau said:
    Is the hex file only used for looking at the sections being written, or is customer planning to use it for programming devices as well?

    It is the latter. The customer wants to use a hex file to write to the device and the same file to Verify.

    Ricky Lau said:

    Hex format do not have concept of pages, so I wondering if the hex file was generated to only including the data on page0 and therefore it did not include the data written to 0x7821C on page1.

    If you have the .out file, you can generate the Object File Dump (ofd) information to confirm that it is writing to the 0x7821C section.

    If I want to unify the files used for Write and Verify, is the only way to do so is to change them to .out files?

    If they use a hex file, they use one that is modified to put 0x7821C on page 0 for Write and page1 for Verify. After that, the contents of 0x7821C can be checked from the Memory Browser...

    Best regards,
    O.H

  • +1 in reply to O.H
    TI__Genius 13105 points

    O.H.

    From what I can see, hex formats do not have page information, so it will map everything to page 0.

    There are 2 options I can see:

    1. The reason verify is initially failing is because the F28075 GEL file does not allow reads to the OTP memory ranges (ie; 0x78200) on page 0. We can manually update the gel file to allow reads.

    2. Instead of using "Verify Image" button in UniFlash, go into "Settings & Utilities" and change the "Download Settings" radio button from "Erase and Program" to "Verify Only" and click "Load Image" instead. This will run through the flash based verify sequence.

    I can provide additional information on these 2 solutions as needed, depending on which one fits into the customers flow.

    Thanks,

    Ricky

  • 0 in reply to Ricky Lau
    Mastermind 6670 points

    Hi Ricky,

    Thank you for suggesting the solution. Since method 2 is simpler, I will ask the customer to try it.

    Ricky Lau said:
    1. The reason verify is initially failing is because the F28075 GEL file does not allow reads to the OTP memory ranges (ie; 0x78200) on page 0. We can manually update the gel file to allow reads.

    We have checked the F28075.gel used by UniFlash.
    C:\ti\uniflash_6.2.0\deskdb\content\TICloudAgent\win\ccs_base\emulation\gel

    As you said, 0x78000 was allowed to be read in page1 (Data memory maps), but 0x78000 was not allowed to be read in page0 (Program memory maps).

    Does this mean that I should edit this manually? Specifically, add the following code to page0 (Program memory maps).

    hotmenu F2807x_Memory_Map()
{
    /* GEL_MapReset(); */
    GEL_MapOn();


    /* Program memory maps */
~~~~~~~~~~~~
~~~~~~~~~~~~
    GEL_MapAddStr(0x00013000,0, 0x1000, "R|W|AS2",0);                    /*   GS7 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00070000,0, 0x400, "R|AS2",0);                       /*   TI OTP BANK0 (2 KBytes)                                 */
    //add
    GEL_MapAddStr(0x00078000,1, 0x400, "R|AS2",0);                       /*   USER OTP BANK0 (2 KBytes)  
    //
    GEL_MapAddStr(0x00080000,0, 0x40000, "R|AS2",0);                     /*   FLASH BANK0 (512 KBytes)  
~~~~~~~~~~~~
~~~~~~~~~~~~

    Best regards,
    O.H

    Fullscreen f28075.gel.txt Download 
    /********************************************************************/
/* f28075.gel                                                      */
/* Version 4.00.0                                                   */
/*                                                                  */
/* This GEL file is to be used with the TMS320F28075 DSP.          */
/* Changes may be required to support specific hardware designs.    */
/*                                                                  */
/* Code Composer Studio supports six reserved GEL functions that    */
/* automatically get executed if they are defined. They are:        */
/*                                                                  */
/* StartUp()              - Executed whenever CCS is invoked        */
/* OnReset()              - Executed after Debug->Reset CPU         */
/* OnRestart()            - Executed after Debug->Restart           */
/* OnPreFileLoaded()      - Executed before File->Load Program      */
/* OnFileLoaded()         - Executed after File->Load Program       */
/* OnTargetConnect()      - Executed after Debug->Connect           */
/*                                                                  */
/********************************************************************/

StartUp()
{

}

OnReset(int nErrorCode)
{
    *(int *)0x7029 = 0x68;  		/* Disable WD */
    
    SetupDCSM();  						/* Initialize DCSM */
	
	Device_Config();
    
    CLA_Clock_Enable();
    
    if (GEL_IsInRealtimeMode())     /* If in real-time-mode */
	{
	}
	else                            /* Put device into C28x Mode */
	{
	  C28x_Mode();   
	}

}

OnRestart(int nErrorCode)
{
/* CCS will call OnRestart() when you do a Debug->Restart and   */
/* after you load a new file.  Between running interrupt based  */
/* programs, this function will clear interrupts and help keep  */
/* the processor from going off into invalid memory.            */
    if (GEL_IsInRealtimeMode())     /* If in real-time-mode */
	{
	}
	else                            /* Put device into C28x Mode */
	{
	  C28x_Mode();   
	}
     IER = 0;
     IFR = 0;
}

OnPreFileLoaded()
{
	GEL_Reset();
}

OnFileLoaded(int nErrorCode, int bSymbolsOnly)
{
 if (!bSymbolsOnly) {
     Device_Cal();
 }
}

OnTargetConnect()
{

    *(int *)0x5F412 =0x000F;      /* RAM INIT FOR M0/M1/D0/D1 Memory  */
    *(int *)0x5F432 =0x003F;      /* RAM INIT FOR LS0..LS5  Memory    */
    *(int *)0x5F452 =0x00FF;      /* RAM INIT FOR GS0..GS7 Memory    */

    if (GEL_IsInRealtimeMode())     /* If in real-time-mode */
    {
    }
    else                            /* Put device into C28x Mode */
    {
        C28x_Mode();   
    }

    F2807x_Memory_Map();        /* Initialize the CCS memory map */

/* Check to see if CCS has been started-up with the DSP already */
/* running in real-time mode.  The user can add whatever        */
/* custom initialization stuff they want to each case.          */

    if (GEL_IsInRealtimeMode())     /* Do real-time mode target initialization */
    {

    }
    else                            /* Do stop-mode target initialization */
    {
        GEL_Reset();                /* Reset DSP */
    }
}


/********************************************************************/
/* These functions are useful to engage/disengage realtime          */
/* emulation mode during debug.  They save the user from having to  */
/* manually perform these steps in CCS.                             */
/********************************************************************/
menuitem "Realtime Emulation Control";

hotmenu Run_Realtime_with_Reset()
{
    GEL_Reset();                /* Reset the DSP */
    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
    GEL_EnableRealtime();       /* Enable Realtime mode */
    GEL_Run();                  /* Run the DSP */
}
hotmenu Run_Realtime_with_Restart()
{
    GEL_Restart();              /* Reset the DSP */
    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
    GEL_EnableRealtime();       /* Enable Realtime mode */
    GEL_Run();                  /* Run the DSP */
}
hotmenu Full_Halt()
{
    GEL_DisableRealtime();      /* Disable Realtime mode */
    GEL_Halt();                 /* Halt the DSP */
}
hotmenu Full_Halt_with_Reset()
{
    GEL_DisableRealtime();      /* Disable Realtime mode */
    GEL_Halt();                 /* Halt the DSP */
    GEL_Reset();                /* Reset the DSP */
}

/*********************************************************************/
/*                         F28075 Memory Map                        */
/*                                                                   */
/*********************************************************************/
menuitem "Initialize Memory Map";

hotmenu F2807x_Memory_Map()
{
    /* GEL_MapReset(); */
    GEL_MapOn();


    /* Program memory maps */
    GEL_MapAddStr(0x00000000,0, 0x400, "R|W|AS2",0);                     /*   M0 RAM (with ECC) (2 KByte)                             */
    GEL_MapAddStr(0x00000400,0, 0x400, "R|W|AS2",0);                     /*   M1 RAM (with ECC) (2 KByte)                             */
    GEL_MapAddStr(0x00008000,0, 0x800, "R|W|AS2",0);                     /*   LS0 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x00008800,0, 0x800, "R|W|AS2",0);                     /*   LS1 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x00009000,0, 0x800, "R|W|AS2",0);                     /*   LS2 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x00009800,0, 0x800, "R|W|AS2",0);                     /*   LS3 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x0000A000,0, 0x800, "R|W|AS2",0);                     /*   LS4 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x0000A800,0, 0x800, "R|W|AS2",0);                     /*   LS5 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x0000B000,0, 0x800, "R|W|AS2",0);                     /*   D0 RAM (with ECC or PARITY) (4KBytes)                   */
    GEL_MapAddStr(0x0000B800,0, 0x800, "R|W|AS2",0);                     /*   D1 RAM (with ECC or PARITY) (4KBytes)                   */
    GEL_MapAddStr(0x0000C000,0, 0x1000, "R|W|AS2",0);                    /*   GS0 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x0000D000,0, 0x1000, "R|W|AS2",0);                    /*   GS1 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x0000E000,0, 0x1000, "R|W|AS2",0);                    /*   GS2 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x0000F000,0, 0x1000, "R|W|AS2",0);                    /*   GS3 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00010000,0, 0x1000, "R|W|AS2",0);                    /*   GS4 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00011000,0, 0x1000, "R|W|AS2",0);                    /*   GS5 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00012000,0, 0x1000, "R|W|AS2",0);                    /*   GS6 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00013000,0, 0x1000, "R|W|AS2",0);                    /*   GS7 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00070000,0, 0x400, "R|AS2",0);                       /*   TI OTP BANK0 (2 KBytes)                                 */
    GEL_MapAddStr(0x00080000,0, 0x40000, "R|AS2",0);                     /*   FLASH BANK0 (512 KBytes)                                */
    GEL_MapAddStr(0x00100000,0, 0x200000, "R|W|AS2",0);                  /*   EMIF-1 (Prog + Data) (4 MBytes) CS2n - ASYNC Access     */
    GEL_MapAddStr(0x00300000,0, 0x80000, "R|W|AS2",0);                   /*   EMIF-1 (Prog + Data) (1 MBytes) CS3n - ASYNC Access     */
    GEL_MapAddStr(0x00380000,0, 0x60000, "R|W|AS2",0);                   /*   EMIF-1 (Prog + Data) (1 MBytes) CS4n - ASYNC Access     */
    GEL_MapAddStr(0x003F0000,0, 0x8000, "R|AS2",0);                      /*   Secure ROM (64 KBytes)                                  */
    GEL_MapAddStr(0x003F8000,0, 0x8000, "R|AS2",0);                      /*   Boot ROM (master) (64 KBytes)                           */
    
    /* Data memory maps */
    GEL_MapAddStr(0x00000000,1, 0x400, "R|W|AS2",0);                     /*   M0 RAM (with ECC) (2 KByte)                             */
    GEL_MapAddStr(0x00000400,1, 0x400, "R|W|AS2",0);                     /*   M1 RAM (with ECC) (2 KByte)                             */
    GEL_MapAddStr(0x00000800,1, 0xC80, "R|W|AS2",0);                     /*   Peripheral Space                                        */
    GEL_MapAddStr(0x00001480,1, 0x80, "R|W|AS2",0);                      /*   CLA1toCPU1 MSG RAM (with PARITY) (256 bytes)            */
    GEL_MapAddStr(0x00001500,1, 0x80, "R|W|AS2",0);                      /*   CPU1toCLA1 MSG RAM (with PARITY) (256 bytes)            */
    GEL_MapAddStr(0x00003000,1, 0x1000, "R|W|AS2",0);                    /*   Configurable Logic Registers (8 KBytes)                 */
    GEL_MapAddStr(0x00004000,1, 0x2000, "R|W|AS2",0);                    /*   Peripheral Space                                        */
    GEL_MapAddStr(0x00006000,1, 0x1000, "R|W|AS2",0);                    /*   High Speed Serial Port Registers (8 KBytes)             */
    GEL_MapAddStr(0x00007000,1, 0x1000, "R|W|AS2",0);                    /*   System Configuration Registers (2 KBytes)               */
    GEL_MapAddStr(0x00008000,1, 0x800, "R|W|AS2",0);                     /*   LS0 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x00008800,1, 0x800, "R|W|AS2",0);                     /*   LS1 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x00009000,1, 0x800, "R|W|AS2",0);                     /*   LS2 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x00009800,1, 0x800, "R|W|AS2",0);                     /*   LS3 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x0000A000,1, 0x800, "R|W|AS2",0);                     /*   LS4 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x0000A800,1, 0x800, "R|W|AS2",0);                     /*   LS5 RAM (with PARITY) (4KBytes)                         */
    GEL_MapAddStr(0x0000B000,1, 0x800, "R|W|AS2",0);                     /*   D0 RAM (with ECC or PARITY) (4KBytes)                   */
    GEL_MapAddStr(0x0000B800,1, 0x800, "R|W|AS2",0);                     /*   D1 RAM (with ECC or PARITY) (4KBytes)                   */
    GEL_MapAddStr(0x0000C000,1, 0x1000, "R|W|AS2",0);                    /*   GS0 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x0000D000,1, 0x1000, "R|W|AS2",0);                    /*   GS1 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x0000E000,1, 0x1000, "R|W|AS2",0);                    /*   GS2 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x0000F000,1, 0x1000, "R|W|AS2",0);                    /*   GS3 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00010000,1, 0x1000, "R|W|AS2",0);                    /*   GS4 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00011000,1, 0x1000, "R|W|AS2",0);                    /*   GS5 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00012000,1, 0x1000, "R|W|AS2",0);                    /*   GS6 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00013000,1, 0x1000, "R|W|AS2",0);                    /*   GS7 RAM (with PARITY) (8KBytes)                         */
    GEL_MapAddStr(0x00040000,1, 0x8000, "R|W|AS4",0);                    /*   Peripheral Space                                        */       
    GEL_MapAddStr(0x00048800,1, 0x1800, "R|W|AS4",0);                    /*   Peripheral Space                                        */  
    GEL_MapAddStr(0x0004A800,1, 0x15800, "R|W|AS4",0);                   /*   Peripheral Space                                        */
    GEL_MapAddStr(0x00070000,1, 0x400, "R|AS2",0);                       /*   TI OTP BANK0 (2 KBytes)                                 */
    GEL_MapAddStr(0x00078000,1, 0x400, "R|AS2",0);                       /*   USER OTP BANK0 (2 KBytes)                               */
    GEL_MapAddStr(0x00080000,1, 0x40000, "R|AS2",0);                     /*   FLASH BANK0 (512 KBytes)                                */
    GEL_MapAddStr(0x01070000,1, 0x80, "R|AS2",0);                        /*   TI OTP BANK0 ECC (2 KBytes)                             */
    GEL_MapAddStr(0x01071000,1, 0x80, "R|AS2",0);                        /*   USER OTP BANK0 ECC (2 KBytes)                           */
    GEL_MapAddStr(0x01080000,1, 0x8000, "R|AS2",0);                      /*   FLASH BANK0 ECC (512 KBytes)                            */
    GEL_MapAddStr(0x00100000,1, 0x200000, "R|W|AS2",0);                  /*   EMIF-1 (Prog + Data) (4 MBytes) CS2n - ASYNC Access     */
    GEL_MapAddStr(0x00300000,1, 0x80000, "R|W|AS2",0);                   /*   EMIF-1 (Prog + Data) (1 MBytes) CS3n - ASYNC Access     */
    GEL_MapAddStr(0x00380000,1, 0x60000, "R|W|AS2",0);                   /*   EMIF-1 (Prog + Data) (1 MBytes) CS4n - ASYNC Access     */
    GEL_MapAddStr(0x003F0000,1, 0x8000, "R|AS2",0);                      /*   Secure ROM (64 KBytes)                                  */
    GEL_MapAddStr(0x003F8000,1, 0x8000, "R|AS2",0);                      /*   Boot ROM (master) (64 KBytes)                           */
    GEL_MapAddStr(0x80000000,1, 0x10000000, "R|W|AS2",0);                /*   EMIF-1 (Data) (0.5 GBytes) CS0n - SDRAM                 */
    
    GEL_MapAddStr(0x01000D00,1, 0x200, "R|W|AS2",0);                     /* Redundant PIE Vector Table                                */

    /* Peripheral memory maps */
    GEL_MapAddStr(0x00048000,3, 0x800, "R|W|AS4",0);                     /*   CANA Registers                                          */   
    GEL_MapAddStr(0x0004A000,3, 0x800, "R|W|AS4",0);                     /*   CANB Registers                                          */
    
    GEL_TextOut("\nMemory Map Initialization Complete\n"); 

}

/********************************************************************/
/* The ESTOP0 fill functions are useful for debug.  They fill the   */
/* RAM with software breakpoints that will trap runaway code.       */
/********************************************************************/
hotmenu Fill_F2807x_RAM_with_ESTOP0()
{
    GEL_MemoryFill(0x000000,1,0x000800,0x7625);      /* Fill M0/M1  */
    GEL_MemoryFill(0x008000,1,0x000800,0x7625);      /* Fill L0     */
    GEL_MemoryFill(0x008800,1,0x001000,0x7625);      /* Fill L1/L2  */
    GEL_MemoryFill(0x009800,1,0x001000,0x7625);      /* Fill L3/L4  */
    GEL_MemoryFill(0x00A800,1,0x000800,0x7625);	     /* Fill L5     */
    
    GEL_MemoryFill(0x00B000,1,0x001000,0x7625);	     /* Fill D0/D1  */

    GEL_MemoryFill(0x00C000,1,0x008000,0x7625);	     /* Fill G0-G7 */
    
}

/********************************************************************/
/*              TI OTP and USER OTP Memory Dump                     */
/********************************************************************/
menuitem "OTP Dump";
hotmenu OTP_Dump()
{
                GEL_MemorySave(0x00070000,1, 0x400, "TI_OTP_Bank0.dat");
                
                GEL_MemorySave(0x00078000,1, 0x400, "USER_OTP_Bank0.dat");
                
                GEL_TextOut("\n********************************************************************** 
                             \nTI OTP and USER OTP Memory Dump Complete!  
                             \nFile Output Directory: <CCS Install Directory>\\ccs<version>\\eclipse 
                             \n                       (e.g. C:\\ti\\ccsv6\\eclipse)
                             \n**********************************************************************\n"); 
}

/********************************************************************/
menuitem "Watchdog";
hotmenu Disable_WD()
{
    *0x7029 = *0x7029 | 0x0068;                /* Set the WDDIS bit */
    *0x7025 = 0x0055;                          /* Service the WD    */
    *0x7025 = 0x00AA;                          /*  once to be safe. */
    GEL_TextOut("\nWatchdog Timer Disabled");
}



/********************************************************************/
menuitem "Addressing Modes";

hotmenu C28x_Mode()
{
    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
}

hotmenu C24x_Mode()
{
    ST1 = ST1 | 0x0100;         /*   AMODE = 1  */
    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
}

hotmenu C27x_Mode()
{
    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
    ST1 = ST1 & (~0x0200);      /* OBJMODE = 0  */
}



/********************************************************************/
/* CLA Clock Enable                                                 */
/* Allows debugger to enable CLA breakpoints (esp. after Reset)     */
/********************************************************************/
menuitem "CLA Clock Enable"
hotmenu CLA_Clock_Enable()
{
 *0x5D322|= 0x1;   /* Set PCLKCR0 bit 0 */
}


/********************************************************************/
/* Load the Device Calibration values from TI OTP                   */
/********************************************************************/
menuitem "Device Calibration"
hotmenu Device_Cal()
{
   /* Currently disabled until trims are established */

}

/********************************************************************/
/* EMU Boot Mode - Set Boot Mode During Debug                       */
/********************************************************************/
menuitem "EMU Boot Mode Select"
hotmenu EMU_BOOT_SARAM()
{
    *0xD00 = 0x0A5A;
}
hotmenu EMU_BOOT_FLASH()
{
    *0xD00 = 0x0B5A;
}

menuitem "SETUP EMIF"
hotmenu SetupEmif1()
{

    *(long int *)0x7C08 =  0xAA0000AA;  	/* GPIO SETUP */
    *(long int *)0x7C46 =  0xAAAAAAAA; 		/* GPIO SETUP */
    *(long int *)0x7C48 =  0x800002AA;		/* GPIO SETUP */
    *(long int *)0x7C82 =  0xFFFFFC00;		/* GPIO SETUP */
    *(long int *)0x7C84 =  0xCFF;			/* GPIO SETUP */
    *(long int *)0x7C86 =  0xAAAAAAAA;		/* GPIO SETUP */
    *(long int *)0x7C88 =  0x2FFFA8AA;		/* GPIO SETUP */

    *(long int *)0x5D324 =  0x3;			/* ENABLE EMIF CLOCK*/
    *(long int *)0x47002 =  0x0;			/* EMIF1 WAIT SETUP */
    *(long int *)0x47008 =  0x181;			/* EMIF-CS2 SETUP */
    *(long int *)0x4700A =  0x181;			/* EMIF-CS3 SETUP */
    *(long int *)0x4700C =  0x181;			/* EMIF-CS4 SETUP */
}

hotmenu SetupDCSM()
{
    int i;
	unsigned long LinkPointer;
	unsigned long *Z1_ZoneSelBlockPtr;
	unsigned long *Z2_ZoneSelBlockPtr;
	int bitpos = 28;
	int zerofound = 0;

	XAR0 = *(unsigned long *)0x703F0;         /* Dummy read of SECDC REGISTER   */
				
	XAR0 = *(unsigned long *)0x78000;         /* Dummy read of Z1 - LinkPointer1 */
	XAR0 = *(unsigned long *)0x78004;         /* Dummy read of Z1 - LinkPointer2 */
	XAR0 = *(unsigned long *)0x78008;         /* Dummy read of Z1 - LinkPointer3 */
	XAR0 = *(unsigned long *)0x78200;         /* Dummy read of Z2 - LinkPointer1 */
	XAR0 = *(unsigned long *)0x78204;         /* Dummy read of Z2 - LinkPointer2 */
	XAR0 = *(unsigned long *)0x78208;         /* Dummy read of Z2 - LinkPointer3 */
	
	XAR0 = *(unsigned long *)0x78010;         /* Dummy read of Z1 - PSWDLOCK  */	
	XAR0 = *(unsigned long *)0x78210;         /* Dummy read of Z2 - PSWDLOCK  */	

	XAR0 = *(unsigned long *)0x78014;         /* Dummy read of Z1 - CRCLOCK  */	
	XAR0 = *(unsigned long *)0x78214;         /* Dummy read of Z2 - CRCLOCK  */	

	XAR0 = *(unsigned long *)0x78018;         /* Dummy read of Z1 - JTAGLOCK  */	
	XAR0 = *(unsigned long *)0x78218;         /* Dummy read of Z2 - JTAGLOCK  */	

	XAR0 = *(unsigned long *)0x7801E;         /* Dummy read of Z1 - BOOTCTRL  */
	XAR0 = *(unsigned long *)0x7821E;         /* Dummy read of Z2 - BOOTCTRL  */

	LinkPointer = *(unsigned long *)0x5F000;         /* Read Z1-Linkpointer out of Z1-LINKPOINTER register */
	LinkPointer = LinkPointer << 3;                              /* Bits 31,30 and 29 as most-sigificant 0 are invalid LinkPointer options */
	while ((zerofound == 0) && (bitpos > -1))
	{
	    if ((LinkPointer & 0x80000000) == 0)
		{
		    zerofound = 1;
			Z1_ZoneSelBlockPtr = (unsigned long *)(0x78000 + ((bitpos + 3)*16));			
		}
		else
		{
		    bitpos--;
			LinkPointer = LinkPointer << 1;
		}
	}
	if (zerofound == 0)
	{
	    Z1_ZoneSelBlockPtr = (unsigned long *)0x78020;
	}

	bitpos = 28;
	zerofound = 0;
	LinkPointer = *(unsigned long *)0x5F040;         /* Read Z2-Linkpointer out of Z1-LINKPOINTER register */
	LinkPointer = LinkPointer << 3;                              /* Bits 31 and 30 as most-sigificant 0 are invalid LinkPointer options */
	while ((zerofound == 0) && (bitpos > -1))
	{
	    if ((LinkPointer & 0x80000000) == 0)
		{
		    zerofound = 1;
			Z2_ZoneSelBlockPtr = (unsigned long *)(0x78200 + ((bitpos + 3)*16));			
		}
		else
		{
		    bitpos--;
			LinkPointer = LinkPointer << 1;
		}
	}
	if (zerofound == 0)
	{
	    Z2_ZoneSelBlockPtr = (unsigned long *)0x78220;
	}
		
	/* Perform dummy reads of the Zone Select Block locations */
	for (i = 0; i < 8; i++)
	{
	    XAR0 =  *Z1_ZoneSelBlockPtr;
	    XAR0 =  *Z2_ZoneSelBlockPtr; 
		Z1_ZoneSelBlockPtr++;
		Z2_ZoneSelBlockPtr++;
	}		
}

menuitem "Device Configuration"
hotmenu Device_Config()
{
    *(unsigned long *)0x0005D008   = *(unsigned long *)0x00070200;    // LOAD PARTIDL Value
    *(unsigned long *)0x0005D00A   = *(unsigned long *)0x00070202;    // LOAD PARTIDH Value
	
	*(unsigned long *)0x0005D010   = *(unsigned long *)0x00070204;    // LOAD DC0 Value
    *(unsigned long *)0x0005D012   = *(unsigned long *)0x00070206;    // LOAD DC1 Value 
    *(unsigned long *)0x0005D014   = *(unsigned long *)0x00070208;    // LOAD DC2 Value 
    *(unsigned long *)0x0005D016   = *(unsigned long *)0x0007020A;    // LOAD DC3 Value 
    *(unsigned long *)0x0005D018   = *(unsigned long *)0x0007020C;    // LOAD DC4 Value
    *(unsigned long *)0x0005D01A   = *(unsigned long *)0x0007020E;    // LOAD DC5 Value
    *(unsigned long *)0x0005D01C   = *(unsigned long *)0x00070210;    // LOAD DC6 Value
    *(unsigned long *)0x0005D01E   = *(unsigned long *)0x00070212;    // LOAD DC7 Value
    *(unsigned long *)0x0005D020   = *(unsigned long *)0x00070214;    // LOAD DC8 Value
    *(unsigned long *)0x0005D022   = *(unsigned long *)0x00070216;    // LOAD DC9 Value
    *(unsigned long *)0x0005D024   = *(unsigned long *)0x00070218;    // LOAD DC10 Value
    *(unsigned long *)0x0005D026   = *(unsigned long *)0x0007021A;    // LOAD DC11 Value
    *(unsigned long *)0x0005D028   = *(unsigned long *)0x0007021C;    // LOAD DC12 Value
    *(unsigned long *)0x0005D02A   = *(unsigned long *)0x0007021E;    // LOAD DC13 Value
    *(unsigned long *)0x0005D02C   = *(unsigned long *)0x00070220;    // LOAD DC14 Value
    *(unsigned long *)0x0005D02E   = *(unsigned long *)0x00070222;    // LOAD DC15 Value
//    *(unsigned long *)0x0005D030   = *(unsigned long *)0x00070224;    // LOAD DC16 Value (Reserved)
    *(unsigned long *)0x0005D032   = *(unsigned long *)0x00070226;    // LOAD DC17 Value
    *(unsigned long *)0x0005D034   = *(unsigned long *)0x00070228;    // LOAD DC18 Value
    *(unsigned long *)0x0005D036   = *(unsigned long *)0x0007022A;    // LOAD DC19 Value
    *(unsigned long *)0x0005D038   = *(unsigned long *)0x0007022C;    // LOAD DC20 Value
    
    *(unsigned long *)0x0005D060   = *(unsigned long *)0x0007022E;    // LOAD PERCNF Value
}

/*** End of file ***/

  • 0 in reply to O.H
    TI__Genius 13105 points

    O.H

    Yes, that is what I was suggesting. This should get around the verification error the customer was seeing. You will also need to move the section back to page 0 before recompiling the hex file.

    After that, we will need to check with the C2000 team to see if we can update the GEL file officially so it gets into a future CCS/UniFlash build. From what I can see, GEL files for newer C2000 devices does give read access to 0x78000 on page 0, so maybe we can do the same for F2807x.

    Thanks,

    Ricky

  • 0 in reply to Ricky Lau
    Mastermind 6670 points

    Hi Ricky,

    Thanks for the reply. I understood.

    If the customer still has problems after trying the solution, I will contact you again.

    Best regards,
    O.H

  • 0 in reply to O.H
    Mastermind 6670 points

    Hi Ricky,

    I'm sorry. There was a mistake in the additional code I suggested last time: the page parameter was still set to 1. The customer was able to "Verify Image" successfully by adding the following code.

    //add
    GEL_MapAddStr(0x00078000,0, 0x400, "R|AS2",0); /* USER OTP BANK0 (2 KBytes)
    //

    Ricky Lau said:
    After that, we will need to check with the C2000 team to see if we can update the GEL file officially so it gets into a future CCS/UniFlash build.

    I would appreciate it if you could let me know if you decide to fix this in a future update.

    Best regards,
    O.H

  • 0 in reply to O.H
    TI__Guru* 87155 points

    O.H, Ricky.

    I am back to office.  Thank you for closing this.  I already notified the gel owner to fix it for this.  

    I am closing this ticket. 

    Thanks and regards,
    Vamsi