Part Number: TMS320F28069M
Other Parts Discussed in Thread: TMS320F28335
I am trying to setup CAN communication with the F28069M Launchpad using CANalyzer. I want the board to use PGN 0xFED9 to send and receive messages. I have configured the CAN registers as follows:
void InitCAN(void)
{
/* Create a shadow register structure for the CAN control registers.
This is needed, since, only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents. This is
especially true while writing to a bit (or group of bits) among bits 16 - 31 */
/* Initialize the CAN module */
InitECan();
InitECanGpio();
MessageReceivedCount = 0;
/* Write to the MSGID field */
EALLOW;
ECanaMboxes.MBOX0.MSGID.all = 0x18FED917; // Transmit 0x00FED9 (AUXIO1) globally from IBIS SA 0x17
ECanaMboxes.MBOX1.MSGID.all = 0x18FED927; // Receive 0x00FED9 (AUXIO1) globally from Machine ECM SA 0x27
// ECanaMboxes.MBOX2.MSGID.all = 0x80FDC527; // Transmit Work Tool ID (PGN 64965/SPN 2902)
EDIS;
/* Configure mask for Mailboxes*/
ECanaLAMRegs.LAM1.all = 0xBF000000; // MSGID Mask for MBOX1 (RX Quick Coupler): b10111111000000000000000000000000
/* Configure bit timing parameters for eCANA*/
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all; // Save the (CANMC) Master Control Register
ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all; // Set the (CANMC) Master Control Register
// Wait until the CPU has been granted permission to change the configuration registers
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all; // Set the (CANES) Error and Status Register
} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..
ECanaShadow.CANBTC.all = 0;
/* The following block is for 90 MHz SYSCLKOUT. (45 MHz CAN module clock Bit rate = 1 Mbps
See Note at end of file. */
ECanaShadow.CANBTC.bit.BRPREG = 11; // 2 for 1 Mbps, 5 for 500 kbps, 11 for 250 kbps, 23 for 125 kbps, 29 for 100 kbps
ECanaShadow.CANBTC.bit.TSEG2REG = 3; // Time Segement 2 for the Bit Timing Configuration Register (length of the phase in TQ units) TSEG2 = TSEG2reg + 1
ECanaShadow.CANBTC.bit.TSEG1REG = 9; // Time Segement 1 for the Bit Timing Configuration Register (length of a bit on the CAN bus) TSEG1 = TSEG1reg + 1
ECanaShadow.CANBTC.bit.SAM = 1; // The CAN module samples three times and make a majority decision.
ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all; // Set the (CANBTC) Bit Timing Configuration Register
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all; // Save the (CANMC) Master Control Register
ECanaShadow.CANMC.bit.CCR = 0 ; // Clear CCR = 0: The CPU requests normal operation.
ECanaShadow.CANMC.bit.ABO = 1; // Set ABO = 1: Auto bus on.
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all; // Set the (CANMC) Master Control Register
// Wait until the CPU no longer has permission to change the configuration registers
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all; // Set the (CANES) Error and Status Register
} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..
/* Configure Mailbox 0 under test as a Transmit mailbox */
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all; // Save the (CANMD) Message Data Register
ECanaShadow.CANMD.bit.MD0 = 0; // Set Mailbox 0 as transmit
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all; // Set the (CANMD) Message Data Register
/* Enable Mailbox 0 under test */
ECanaShadow.CANME.all = ECanaRegs.CANME.all; // Save the (CANME) Mailbox Enable Register
ECanaShadow.CANME.bit.ME0 = 1; // Enable Mailbox 0
ECanaRegs.CANME.all = ECanaShadow.CANME.all; // Set the (CANME) Mailbox Enable Register
/* Configure Mailbox 1 under test as a Recieve mailbox */
ECanaMboxes.MBOX1.MSGID.bit.IDE = 1; // Set Mailbox 1 with a 29-bit extended MSGID
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all; // Save the (CANMD) Message Data Register
ECanaShadow.CANMD.bit.MD1 = 1; // Set Mailbox 1 as recieve
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all; // Set the (CANMD) Message Data Register
/* Enable Mailbox 1 under test */
ECanaShadow.CANME.all = ECanaRegs.CANME.all; // Save the (CANME) Mailbox Enable Register
ECanaShadow.CANME.bit.ME1 = 1; // Enable Mailbox 1
ECanaRegs.CANME.all = ECanaShadow.CANME.all; // Set the (CANME) Mailbox Enable Register
// /* Configure Mailbox 2 under test as a Transmit mailbox */
// ECanaShadow.CANMD.all = ECanaRegs.CANMD.all; // Save the (CANMD) Message Data Register
// ECanaShadow.CANMD.bit.MD2= 0; // Set Mailbox 2 as transmit
// ECanaRegs.CANMD.all = ECanaShadow.CANMD.all; // Set the (CANMD) Message Data Register
//
// /* Enable Mailbox 2 under test */
// ECanaShadow.CANME.all = ECanaRegs.CANME.all; // Set the (CANME) Mailbox Enable Register
// ECanaShadow.CANME.bit.ME2 = 1; // Enable Mailbox 2
// ECanaRegs.CANME.all = ECanaShadow.CANME.all; // Save the (CANME) Mailbox Enable Register
/* Write to DLC field in Master Control reg */
ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8; // Set the DLC to 8 Bytes for Mailbox 0
ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8; // Set the DLC to 8 Bytes for Mailbox 1
// ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8; // Set the DLC to 8 Bytes for Mailbox 2
EALLOW;
ECanaRegs.CANMIL.bit.MIL1=0; // Clear the Mailbox Interrupt Level bit
ECanaRegs.CANGIM.bit.I0EN=1; // Set the Global Mailbox Interrupt Mask bit
ECanaRegs.CANMIM.all = 0x00000002; // Set the Mailbox Interrupt Mask Register for Mailbox 1
EDIS;
}
However, when I run this code I get a transmit FRAME error when sending the 18fed927 00FF00FF0000 to the launchpad. The receive hardware interrupt of the launchpad is shown below.
void CAN_HWI(void)
{
// Semaphore_post(CANRXSem); // Enable the CANRX_Task in order to process the recieved CAN message
unsigned long long CAN_Data = 0;
do
{
ECanaShadow.CANRMP.all = ECanaRegs.CANRMP.all; // Set the (CANRMP) Received-Message-Pending Register
}
while(ECanaShadow.CANRMP.bit.RMP1 != 1 ); // if Mailbox 1 has not received any messages
ECanaShadow.CANRMP.bit.RMP1 = 1; // Set Mailbox 1 as having recieved a message
ECanaRegs.CANRMP.all = ECanaShadow.CANRMP.all;
CAN_Data = ECanaMboxes.MBOX1.MDH.all + (ECanaMboxes.MBOX1.MDL.all * 4294967296L); // Receive the messages from Mailbox 1
Mailbox_post(CANMbx, &CAN_Data, BIOS_NO_WAIT); // Wait until you get the data received from CANaylzer
PieCtrlRegs.PIEACK.bit.ACK9 = 1;
}
What am I doing wrong?
