LAUNCHXL-F28379D: Measure a current via the SigmaDelta sensors

Hi Danilo,

Danilo A. said:

If the "real" current is zero (no source is connected), the output of the SD-Sensor should gives exactly the same amount of "0" like "1", right? But if you see the attached photo, this seems violated. But maybe this is not the correct interpretation of me.

I will attempt to answer this, but may need to push this thread to the product group supporting this device for a more detailed response.

Your understanding is correct. For this device, a differential voltage of 0V (corresponding to zero current across shunt resistor) should yield a stream that is high 50% of the time. This percentage varies between 11% and ~90% depending on the differential voltage (refer to the device datasheet Digital Output section for details).

Danilo A. said:

Could you explain what i can see on the photo? Why are there different ratios?

Here we may have to defer to the sigma-delta ADC group. It looks like the sigma-delta is not "seeing" exactly 0V at its input. They may be able to provide a better approach to get this differential voltage to be exactly 0V.

Danilo A. said:

As i thought, the SDFM filters the uncoded bitstream and gives out a 16 or 32 bit number which represents the measured current.
But if i scope the output of the SDFM module, it seems that this is a bitstream too? If you see the attached file, this is the SDFM output signal, which varies from 0 to 2^16.

Danilo A. said:

Is this correct? If yes, could you give me some hints how to get the "real world value" of the current?
What is the sampling time / ISR where the sdfm should be implemented?

Just like the stream output of the sigma-delta ADC varies between a low percentage to a high percentage, the output of the SDFM filter will also vary between a high value and a low value. Once you understand the correlation between digital filter output to the differential voltage seen at the input to the SD-ADC and the correlation between the differential voltage and the input current, you can use the filter output to calculate the filter current.There is a nice write-up in the answer to the post below about this.

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/694143/ccs-tms320f28377d-i-need-help-with-sdfm#pi320995=3

You do not want to interrupt the CPU every time the SDFM has a new value. This will overload the CPU with interrupts. Most folks would set the compare interrupts just so their application is notified of some abnormal event (e.g. current crosses some threshold). Upon receiving such event, the code can read the more precise data value(s) from the data filter unit. Other folks just want to get a measurement some time after a switching event, say they switch a FET (via) PWM and want to get an SDFM reading some time after from the SDFM. 

Hi Gus,

Thank you for your response. We have received further inquiries from our customer as follows,

Sorry for the late reply. First, thanks for that comprehensive answer. I need(ed) some time to get for full understanding of it.

>Just like the stream output of the sigma-delta ADC varies between a low percentage to a high percentage, the output of the SDFM filter will also vary between a high value and a low value.

Yes, thats what i thougt - but just to be clear - the output signal of the SDFM is a scalar with an uint16 or uint32 format right? I mean, if the bitstream of the SD-ADC has a 60% highs and 40% lows, than the output of the SDFM is 60percent of 2^16 (2^32) which means 39322. Is that correct?

>You do not want to interrupt the CPU every time the SDFM has a new value.

Of course not. I meant, that i need the output value of the SDFM inside some interrupted funktions. To be clear - my current controll function is interrupted by the PWM and i could take (in simulink) the SDFM Block an embed it inside of this function block. There was no problem for other periphal blocks so far. But in case of the SDFM i dont get any value.

I think i understanded the working principle of the SD-ADC with the SDFM but not the specific implementation via Simulink. I would like to show you how I work with simulink and maybe you can see what exactly is wrong with it.

1. First the connection of the ADC-SDs output to the F28379d (attachment 1).

2. The data signal that goes to Pin 99, 103 and 107 and the clock signal that goes to 101,105 and 109 is shown in attachment 2.

3. The configuration of the SDFM via simulink is shown in attachment 3. As you can see, i can set the GPIOs and the Modulator Mode (I choosed 0 because of your recommendation in case CS0451054). For now i dont need HLT and LLT actions, thats why both are zero. For first testing szenarios i dont need pwm synchronization or interrupts.

4. My current control function is shown in attachment 4. Inside this block my SDFM block is embed.

5. The specific SDFM Block is configurable in differnt ways. See attachement 5. It will be sampled every time, when the PWM gives a trigger signal to the superordinate function block.

6. At least you can see the see code of the block. 

Thank you for your support!

Regards,

Danilo

Danilo A. said:

Yes, thats what i thougt - but just to be clear - the output signal of the SDFM is a scalar with an uint16 or uint32 format right? I mean, if the bitstream of the SD-ADC has a 60% highs and 40% lows, than the output of the SDFM is 60percent of 2^16 (2^32) which means 39322. Is that correct?

The output range of the SDFM depends several factors: the filter unit (data or comparator), the filter used, and OSR. The TRM has the exact ranges. Furthermore the data filter unit has a 32- and 16-bit mode. In the 16-bit mode you can shift the result.

Danilo A. said:

I think i understanded the working principle of the SD-ADC with the SDFM but not the specific implementation via Simulink. I would like to show you how I work with simulink and maybe you can see what exactly is wrong with it.

I don't have experience with Simulink. Let me see if somebody else can comment here.

Hi Gus,

Thank you for your feedback. I apologize that I forgot to attached the screenshot which were shared by our customer. I have posted the screenshots above.

We will be waiting for your response.

Regards,

Danilo

Hi Danilo, one of our folks that has more experience with Simulink will look at this today.

Hi Gus,

Thank you for the update and support!

Regards,

Danilo

Danilo,

I'm still investigating/getting up to speed with the above posts.  I'll give an update by the end of the day today. 

Best,

Matthew

Apologies on the delayed response here. I'm still pinging my colleague to take a look. 

Danilo,

From what I can tell the setup is correct, I think there are 2 things in play:

1)How the Simulink block generate new data; from the setting I believe new data will be pushed out as soon as the filter buffer is full(this is what the -1 setting is doing)

2)The interpretation of the data and what the bit stream represents.

For #2, there is a example included in Simulink to help show the relationship between the analog signal and the SDFM output.

Customer can get it open from the command line

openExample('texasinstrumentsc2000/UsingSigmaDeltaFilterModuleSDFMToMeasureExample')

The MW page is here: https://www.mathworks.com/help/supportpkg/texasinstrumentsc2000/ug/sdfmexample.html

In this example the MW team has connected the output of the onchip DAC to the SDFM, and then scoped the digital DAC value beside the SDFM sensed of the DAC.  If this is possible on the customer board I think this will help derive the relationship.  They can also compare the settings of the blocks between the example and theirs(I did a quick look, and things look OK to me).

Let me know if I'm on the right track here.

Best,

Matthew

Hi Matthew,

Thank you for the updates. Here is the customer's feedback,

1)How the Simulink block generate new data; from the setting I believe new data will be pushed out as soon as the filter buffer is full(this is what the -1 setting is doing)

In all other blocks i used and in simulink simulations the "-1" in "sample time" means, that this block will be sampled with the same sample time of the routine where it is included. In my case, the current control routine (20µs).

For example: If i use a "delay" block to delay lets say some voltage in an ISR which is excecuted every 20µs/50kHz, then this voltage will be delayed with same sampling time, 20µs.

But >data will be pushed out as soon as the filter buffer is full< could be an interristing aspect:
What does that mean? As you can see in the block - the sdfm requests for a sample time - but what, if the sample time differs from the time when the buffer is full?

>For #2, there is a example included in Simulink to help show the relationship between the analog signal and the SDFM output.

I think it would be no problem for me to understand the relationship between the SDFMs output and the real current, if the sdfm would give me any output. But there is actually either nonsense (please see scope_SDFM_output.png) or nothing.

My SD-ADC is included in: www.ti.com/.../TIDA-01606
To run the example I need an extra SD-ADC but unfortunately i'm not able to get one at the moment.
The example differs in that way from my approach, that it shows no handling with ISRs and no further control in different subroutines. So far i'm very happy with MW solutions but this very small example can not fix my problem.

Let me check again my workflow with the SD-ADC and the SDFM and i will give you an update in some days.
The specialists answer was not very helpful for me so far or maybe i need some more time to understand. 

Regards,

Danilo

Danilo,

I've asked the MW team to take a look as well to give any feedback that would be applicable.

Best,

Matthew

Hi Matthew,

Thank you for your support. We will wait for their feedback.

Regards,

Danilo

Hi Danilo,

Your understanding is correct below here:

In all other blocks I used and in Simulink simulations, the "-1" in "sample time" means, that this block will be sampled with the same sample time of the routine where it is included. In my case, the current control routine (20µs).

Now for your doubt:

But >data will be pushed out as soon as the filter buffer is full< could be an interesting aspect:
What does that mean? As you can see in the block - the sdfm requests for a sample time - but what, if the sample time differs from the time when the buffer is full?

If the sample time differs from the time when the buffer is full, then the hardware buffer is likely to be overwritten with the next in-coming value. Hence, to achieve the sync, it is good to read on an interrupt, which I think you are already doing. When the blocks are used in interrupt context, it is must to put sample time to -1, as the block code will be placed in ISR.' -1' would mean use the sample rate of the subsystem in which the block is placed.

For the case:

I think it would be no problem for me to understand the relationship between the SDFMs output and the real current, if the sdfm would give me any output. But there is actually either nonsense (please see scope_SDFM_output.png) or nothing.

Did you try to run our shipping example as it is and see if that works in the first place? Do you have any observations from that example? 

Regards,

Venkatesh C

Hi Venkatesh, 

We just received this feedback from our customer,

I've done new analog and digital measurements and will give you the setting and the result:

All three SD-ADC (AMC1306M05DWVR) gets the same clock signal and provide three similar output streams which you can see in the attachment 1 (full) and 2 (detailed).

The clock signal goes into pins 101,105 and 109 (GPIO 49,51,53) and the data signal into pins 99,103 and 107 (GPIO 48,50,52) of the F28379d control card. These are the input pins of the SDFM 1, filter channel 1, 2 and 3 and represents in this case a zero current of phase 1,2 and 3 of the TIDA-01606 (no source is connected).

The SDFM 1 settings are the same like in the mathworks example 'c28x7x_sdfm.slx' (expect the assigned GPIOs) as you can see in attachment 3.

Each filter channel settings are the same as you can see in attachment 4.

Attachment 5 shows the digital results. As you can see, the output of Ch.1 is about 65000, close to 2^16. The output of Ch.2 and 3 are similar, close to 10.

The question is, why is there such a big difference between the output signals of the SDFM Channels although the input streams seems very similar (to me).

I took a new control card to prevent that this could be a hardware fault of the card, but the results remain the same.

Regards,

Danilo

Hi Danilo,

Can the customer debug this in CCS? Is it the same values being seen in the SDFM Filter data register?

I would recommend starting with our shipping example and ensure it works as expected. It would then be a good idea to open this shipping example from CCS and see if the register values match the values as seen in Simulink.

This will help the customer when he moves to his setup to debug in CCS.

HTH,

Regards,

Venkatesh C

Hi Venkatesh,

Here is the response of our customer,

i debugged this in CCS and the same values can be seen in the SDFM Filter Data register as you can see in the attachment.

What exactly means "Data 16=0,Data32Hi = 65228" (Filter 1)?
respectively:
"Data 16=0,Data32Hi = 6" (Filter 2)
"Data 16=0,Data32Hi = 14" (Filter 3)

Could it be, that the 32bit output is chosen instead of the 16bit? - compare to attachment "4_Settings_for_SD_ADC2". 

Maybe this could be a first hint for the faults.

-> I would recommend starting with our shipping example and ensure it works as expected.

I will try this but the shipping example has to be adjusted for TI's TIDA-1606. There are other PWMs settings and i chosed matlab to generate code because it is (theoretical) much easier and faster as c-code writing in CCS.
Maybe your specialists could help me to adjust the example?

I will give you an update next week.

Regards,

Danilo

Danilo,

You can read the SDDPARMx register to figure out the filter configuration. From here you can tell if the filter is set for 32- or 16-bit mode and also the shift configuration.

Hi Danilo,

Can you check and try the following things on the setup currently used for SDFM?

1. What is the input analog voltage at the SDFM when user is seeing 65000, 9 and 14 at the input. Can user measure and confirm the value using multimeter or oscilloscope by probing?
2. User is using PWM interrupt to read the data periodically using PWM interrupt. But this does not mean the data is ready in SDFM when we are reading it. Can you use the status port DFSTS = 1, and check if the data is a valid one? You can configure the Enable data filter acknowledge interrupt parameter in Configuration parameters as well.

Thanks,

Aditya

Hi Gus and Aditya,

Here are our customer's response

> You can read the SDDPARMx register to figure out the filter configuration. From here you can tell if the filter is set for 32- or 16-bit mode and also the shift configuration.

Thanks for that hint. I will check this today or tomorrow.

> What is the input analog voltage at the SDFM when user is seeing 65000, 9 and 14 at the input. Can user measure and confirm the value using multimeter or oscilloscope by probing?

I already sended this to you. Please see attachment

In addition, i will measure the output signal via multimeter and will give you an update today or tomorrow.

> User is using PWM interrupt to read the data periodically using PWM interrupt. But this does not mean the data is ready in SDFM when we are reading it. Can you use the status port DFSTS = 1, and check if the data is a valid one? You can configure the Enable data filter acknowledge interrupt parameter in Configuration parameters as well.

I checked the DFSTS status and it is 1 for all SDFMs.

Regards,

Danilo

Danilo,

Danilo A. said:

> What is the input analog voltage at the SDFM when user is seeing 65000, 9 and 14 at the input. Can user measure and confirm the value using multimeter or oscilloscope by probing?

I already sended this to you. Please see attachment

Aditya Padmanabha can confirm, but I think the question was about the voltage at the input to the AMC device.

Hi Danilo, Gus,

Sorry for the misunderstanding, yes I wanted the input analog voltage to the external AMC device before it is converted into analog SD signals as we see from the oscilloscope screenshots.

Thanks,

Aditya

Hi Gus and Aditya,

Please see our customer's response below.

The input voltage for all AMC devices (Pin 1) is about 5V (verified via multimeter).
Attached you can see the schematic in which way the amc is implemented in Ti's TIDA-1606.

The output voltage of the bitstream is about 3.3V/2 = 1.65V for all three devices.
The bitstream is about 50% ones and zeros as you can also see in previous attachements i sended.

The Controler Cards SD-Flter Modules parameter are

Modulator Clock Mode: 0
Comperator filter type: Sinc1
Comperator over sampling ration: 0
Comperator higher threshold: 0
Comperator lower treshold: 0
Data filter type: Sinc3
Data filter over sampling ration: 255

Data represent: 16bit

-> These are the same parameters as in the Mathworks example >> www.mathworks.com/.../sdfmexample.html

From Mathworks: " For the below (above) SDFM configuration, the output data range is (-32,768 to 32,767) "
This tells me, that the SDFM Filter output should be close to zero for a 50% bitstream.

I think that there is some problem with the implementation of the SD Filter module in the C-Code

Regards,

Danilo

Hi Danilo,

1. Maybe someone for TI can answer this - For AMC1306M05 which is generating the SD signals for SDFMN module the operating input rage is given as  ±50-mV or ±250-mV in the data sheet. If we give 5V volts what will be the actual state of the SD signals?
2. In MathWorks example, the voltage given to AMC in 190 mv which is in this range and the formula provided there holds good for this voltage range. So I am not sure what will be the behavior if you give a voltage outside the supported range of AMC1306.

Thanks,

Aditya

Hi Danillo,

I think you are referring to the voltage at pin AVDD as 5V, but the differential voltage at AINP and AINN are the ones that results in the SD signal at DOUT. So we need to measure those voltages.

Thanks,

Aditya