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Dear Champs,
I am asking this for our customer.
In TRM, it says for INTCODE, "........A CPU read will clear this field. ..... a CPU read will also clear the associated interrupt flag bit in the I2CSTR register."
Questions:
1) In our testing, we read INTCODE when using AAS interrupt only. We saw INTCODE was cleared to zero but I2CSTR.AAS was not cleared on CCS watch window.
We wonder if this is right behavior or is I2CSTR.AAS is an exception?
That is, even if INTCODE = 0x7 (AAS) can be cleared by reading INTCODE, but I2CSTR.AAS cannot be cleared.
2) For associated interrupt flag bit in the I2CSTR except AAS, they will be cleared by reading associated codes in INTCODE. Would you please confirm this?
Wayne Huang
Wayne,
Not all I2CSTR flag bits are cleared when I2CISRC register is read by CPU. AAS flag doesn't get affected by CPU read of I2CISRC register. Please check I2CSTR register bit-fields for mode detail
I2CSTR bit-fields which get affected by CPU read of I2CISRC register are ARBL (Arbitration Lost), NACK (No-acknowledge) & STP (Stop condition)
Regards,
Manoj