TMS320F28379D: Program_error using SCI boot - where to look

Philip,

Looks like you are mapping something to RAM in your linker cmd file.

Flash kernels are made to load or program RAM.

Please use flash based linker cmd file where all the code sections and initialized data sections are mapped to flash.

Uninitialized data sections (like stack) are assigned to RAM.

Thanks and regards,
Vamsi

I'm using a standard TI cmd file.  I can't seem to locate where it loads into RAM as you are saying.  I'm posting the TI cmd file text below.

MEMORY
{
PAGE 0: /* Program Memory */

PAGE 1: /* Data Memory */

ADCA_RESULT : origin = 0x000B00, length = 0x000020
ADCB_RESULT : origin = 0x000B20, length = 0x000020
ADCC_RESULT : origin = 0x000B40, length = 0x000020
ADCD_RESULT : origin = 0x000B60, length = 0x000020

ADCA : origin = 0x007400, length = 0x000080
ADCB : origin = 0x007480, length = 0x000080
ADCC : origin = 0x007500, length = 0x000080
ADCD : origin = 0x007580, length = 0x000080

ANALOG_SUBSYS : origin = 0x05D180, length = 0x000080

CANA : origin = 0x048000, length = 0x000800
CANB : origin = 0x04A000, length = 0x000800

CLA1 : origin = 0x001400, length = 0x000040 /* CLA registers */

CLB_XBAR : origin = 0x007A40, length = 0x000040

CMPSS1 : origin = 0x005C80, length = 0x000020
CMPSS2 : origin = 0x005CA0, length = 0x000020
CMPSS3 : origin = 0x005CC0, length = 0x000020
CMPSS4 : origin = 0x005CE0, length = 0x000020
CMPSS5 : origin = 0x005D00, length = 0x000020
CMPSS6 : origin = 0x005D20, length = 0x000020
CMPSS7 : origin = 0x005D40, length = 0x000020
CMPSS8 : origin = 0x005D60, length = 0x000020

CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer1 registers */
CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer2 registers */

DACA : origin = 0x005C00, length = 0x000010
DACB : origin = 0x005C10, length = 0x000010
DACC : origin = 0x005C20, length = 0x000010

DMA : origin = 0x001000, length = 0x000200
DMACLASRCSEL : origin = 0x007980, length = 0x000040

ECAP1 : origin = 0x005000, length = 0x000020 /* Enhanced Capture 1 registers */
ECAP2 : origin = 0x005020, length = 0x000020 /* Enhanced Capture 2 registers */
ECAP3 : origin = 0x005040, length = 0x000020 /* Enhanced Capture 3 registers */
ECAP4 : origin = 0x005060, length = 0x000020 /* Enhanced Capture 4 registers */
ECAP5 : origin = 0x005080, length = 0x000020 /* Enhanced Capture 5 registers */
ECAP6 : origin = 0x0050A0, length = 0x000020 /* Enhanced Capture 6 registers */

EMIF1 : origin = 0x047000, length = 0x000800
EMIF2 : origin = 0x047800, length = 0x000800

EQEP1 : origin = 0x005100, length = 0x000040 /* Enhanced QEP 1 registers */
EQEP2 : origin = 0x005140, length = 0x000040 /* Enhanced QEP 2 registers */
EQEP3 : origin = 0x005180, length = 0x000040 /* Enhanced QEP 3 registers */

EPWM1 : origin = 0x004000, length = 0x000100 /* Enhanced PWM 1 registers */
EPWM2 : origin = 0x004100, length = 0x000100 /* Enhanced PWM 2 registers */
EPWM3 : origin = 0x004200, length = 0x000100 /* Enhanced PWM 3 registers */
EPWM4 : origin = 0x004300, length = 0x000100 /* Enhanced PWM 4 registers */
EPWM5 : origin = 0x004400, length = 0x000100 /* Enhanced PWM 5 registers */
EPWM6 : origin = 0x004500, length = 0x000100 /* Enhanced PWM 6 registers */
EPWM7 : origin = 0x004600, length = 0x000100 /* Enhanced PWM 7 registers */
EPWM8 : origin = 0x004700, length = 0x000100 /* Enhanced PWM 8 registers */
EPWM9 : origin = 0x004800, length = 0x000100 /* Enhanced PWM 9 registers */
EPWM10 : origin = 0x004900, length = 0x000100 /* Enhanced PWM 10 registers */
EPWM11 : origin = 0x004A00, length = 0x000100 /* Enhanced PWM 11 registers */
EPWM12 : origin = 0x004B00, length = 0x000100 /* Enhanced PWM 12 registers */

EPWM_XBAR : origin = 0x007A00, length = 0x000040

FLASH0_CTRL : origin = 0x05F800, length = 0x000300
FLASH0_ECC : origin = 0x05FB00, length = 0x000040

GPIOCTRL : origin = 0x007C00, length = 0x000180 /* GPIO control registers */
GPIODAT : origin = 0x007F00, length = 0x000030 /* GPIO data registers */

OUTPUT_XBAR : origin = 0x007A80, length = 0x000040
I2CA : origin = 0x007300, length = 0x000040 /* I2C-A registers */
I2CB : origin = 0x007340, length = 0x000040 /* I2C-B registers */

IPC : origin = 0x050000, length = 0x000024

FLASHPUMPSEMAPHORE : origin = 0x050024, length = 0x000002

ROMPREFETCH : origin = 0x05E608, length = 0x000002

MEMCFG : origin = 0x05F400, length = 0x000080 /* Mem Config registers */
EMIF1CONFIG : origin = 0x05F480, length = 0x000020 /* Emif-1 Config registers */
EMIF2CONFIG : origin = 0x05F4A0, length = 0x000020 /* Emif-2 Config registers */
ACCESSPROTECTION : origin = 0x05F4C0, length = 0x000040 /* Access Protection registers */
MEMORYERROR : origin = 0x05F500, length = 0x000040 /* Access Protection registers */
ROMWAITSTATE : origin = 0x05F540, length = 0x000002 /* ROM Config registers */

MCBSPA : origin = 0x006000, length = 0x000040 /* McBSP-A registers */
MCBSPB : origin = 0x006040, length = 0x000040 /* McBSP-A registers */

NMIINTRUPT : origin = 0x007060, length = 0x000010 /* NMI Watchdog Interrupt Registers */

PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */
PIE_VECT : origin = 0x000D00, length = 0x000200 /* PIE Vector Table */
SCIA : origin = 0x007200, length = 0x000010 /* SCI-A registers */
SCIB : origin = 0x007210, length = 0x000010 /* SCI-B registers */
SCIC : origin = 0x007220, length = 0x000010 /* SCI-C registers */
SCID : origin = 0x007230, length = 0x000010 /* SCI-D registers */

SDFM1 : origin = 0x005E00, length = 0x000080 /* Sigma delta 1 registers */
SDFM2 : origin = 0x005E80, length = 0x000080 /* Sigma delta 2 registers */

SPIA : origin = 0x006100, length = 0x000010
SPIB : origin = 0x006110, length = 0x000010
SPIC : origin = 0x006120, length = 0x000010
SPID : origin = 0x006130, length = 0x000010

UPP : origin = 0x006200, length = 0x000100 /* uPP registers */

DEV_CFG : origin = 0x05D000, length = 0x000180
CLK_CFG : origin = 0x05D200, length = 0x000100
CPU_SYS : origin = 0x05D300, length = 0x000100

INPUT_XBAR : origin = 0x007900, length = 0x000020
XBAR : origin = 0x007920, length = 0x000020
SYNC_SOC : origin = 0x007940, length = 0x000010
WD : origin = 0x007000, length = 0x000040

XINT : origin = 0x007070, length = 0x000010

DCSM_Z1 : origin = 0x05F000, length = 0x000030 /* Zone 1 Dual code security module registers */
DCSM_Z2 : origin = 0x05F040, length = 0x000030 /* Zone 2 Dual code security module registers */
DCSM_COMMON : origin = 0x05F070, length = 0x000010 /* Common Dual code security module registers */

DCSM_Z1_OTP : origin = 0x078000, length = 0x000020 /* Part of Z1 OTP. LinkPointer/JTAG lock/ Boot Mode */
DCSM_Z2_OTP : origin = 0x078200, length = 0x000020 /* Part of Z2 OTP. LinkPointer/JTAG lock */
}

SECTIONS
{
/*** PIE Vect Table and Boot ROM Variables Structures ***/
UNION run = PIE_VECT, PAGE = 1
{
PieVectTableFile
GROUP
{
EmuBModeVar
EmuBootPinsVar
}
}

AdcaResultFile : > ADCA_RESULT, PAGE = 1
AdcbResultFile : > ADCB_RESULT, PAGE = 1
AdccResultFile : > ADCC_RESULT, PAGE = 1
AdcdResultFile : > ADCD_RESULT, PAGE = 1

AdcaRegsFile : > ADCA, PAGE = 1
AdcbRegsFile : > ADCB, PAGE = 1
AdccRegsFile : > ADCC, PAGE = 1
AdcdRegsFile : > ADCD, PAGE = 1

AnalogSubsysRegsFile : > ANALOG_SUBSYS, PAGE = 1

CanaRegsFile : > CANA, PAGE = 1
CanbRegsFile : > CANB, PAGE = 1

Cla1RegsFile : > CLA1, PAGE = 1
Cla1SoftIntRegsFile : > PIE_CTRL, PAGE = 1, type=DSECT

ClbXbarRegsFile : > CLB_XBAR PAGE = 1

Cmpss1RegsFile : > CMPSS1, PAGE = 1
Cmpss2RegsFile : > CMPSS2, PAGE = 1
Cmpss3RegsFile : > CMPSS3, PAGE = 1
Cmpss4RegsFile : > CMPSS4, PAGE = 1
Cmpss5RegsFile : > CMPSS5, PAGE = 1
Cmpss6RegsFile : > CMPSS6, PAGE = 1
Cmpss7RegsFile : > CMPSS7, PAGE = 1
Cmpss8RegsFile : > CMPSS8, PAGE = 1

CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1
CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1

DacaRegsFile : > DACA PAGE = 1
DacbRegsFile : > DACB PAGE = 1
DaccRegsFile : > DACC PAGE = 1

DcsmZ1RegsFile : > DCSM_Z1, PAGE = 1
DcsmZ2RegsFile : > DCSM_Z2, PAGE = 1
DcsmCommonRegsFile : > DCSM_COMMON, PAGE = 1

/*** Warning: Only remove "Type = NOLOAD" to program OTP Locations ***/
DcsmZ1OtpFile : > DCSM_Z1_OTP, PAGE = 1, type = NOLOAD
DcsmZ2OtpFile : > DCSM_Z2_OTP, PAGE = 1, type = NOLOAD

DmaRegsFile : > DMA PAGE = 1
DmaClaSrcSelRegsFile : > DMACLASRCSEL PAGE = 1

ECap1RegsFile : > ECAP1, PAGE = 1
ECap2RegsFile : > ECAP2, PAGE = 1
ECap3RegsFile : > ECAP3, PAGE = 1
ECap4RegsFile : > ECAP4, PAGE = 1
ECap5RegsFile : > ECAP5, PAGE = 1
ECap6RegsFile : > ECAP6, PAGE = 1

Emif1RegsFile : > EMIF1 PAGE = 1
Emif2RegsFile : > EMIF2 PAGE = 1

EPwm1RegsFile : > EPWM1, PAGE = 1
EPwm2RegsFile : > EPWM2, PAGE = 1
EPwm3RegsFile : > EPWM3, PAGE = 1
EPwm4RegsFile : > EPWM4, PAGE = 1
EPwm5RegsFile : > EPWM5, PAGE = 1
EPwm6RegsFile : > EPWM6, PAGE = 1
EPwm7RegsFile : > EPWM7, PAGE = 1
EPwm8RegsFile : > EPWM8, PAGE = 1
EPwm9RegsFile : > EPWM9, PAGE = 1
EPwm10RegsFile : > EPWM10, PAGE = 1
EPwm11RegsFile : > EPWM11, PAGE = 1
EPwm12RegsFile : > EPWM12, PAGE = 1

EPwmXbarRegsFile : > EPWM_XBAR PAGE = 1

EQep1RegsFile : > EQEP1, PAGE = 1
EQep2RegsFile : > EQEP2, PAGE = 1
EQep3RegsFile : > EQEP3, PAGE = 1

Flash0CtrlRegsFile : > FLASH0_CTRL PAGE = 1
Flash0EccRegsFile : > FLASH0_ECC PAGE = 1

GpioCtrlRegsFile : > GPIOCTRL, PAGE = 1
GpioDataRegsFile : > GPIODAT, PAGE = 1

OutputXbarRegsFile : > OUTPUT_XBAR PAGE = 1
I2caRegsFile : > I2CA, PAGE = 1
I2cbRegsFile : > I2CB, PAGE = 1
InputXbarRegsFile : > INPUT_XBAR PAGE = 1
XbarRegsFile : > XBAR PAGE = 1
IpcRegsFile : > IPC, PAGE = 1

FlashPumpSemaphoreRegsFile : > FLASHPUMPSEMAPHORE, PAGE = 1

RomPrefetchRegsFile : > ROMPREFETCH, PAGE = 1
MemCfgRegsFile : > MEMCFG, PAGE = 1
Emif1ConfigRegsFile : > EMIF1CONFIG, PAGE = 1
Emif2ConfigRegsFile : > EMIF2CONFIG, PAGE = 1
AccessProtectionRegsFile : > ACCESSPROTECTION, PAGE = 1
MemoryErrorRegsFile : > MEMORYERROR, PAGE = 1
RomWaitStateRegsFile : > ROMWAITSTATE, PAGE = 1

McbspaRegsFile : > MCBSPA, PAGE = 1
McbspbRegsFile : > MCBSPB, PAGE = 1

UppRegsFile : > UPP, PAGE = 1

NmiIntruptRegsFile : > NMIINTRUPT, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1

SciaRegsFile : > SCIA, PAGE = 1
ScibRegsFile : > SCIB, PAGE = 1
ScicRegsFile : > SCIC, PAGE = 1
ScidRegsFile : > SCID, PAGE = 1

Sdfm1RegsFile : > SDFM1, PAGE = 1
Sdfm2RegsFile : > SDFM2, PAGE = 1

SpiaRegsFile : > SPIA, PAGE = 1
SpibRegsFile : > SPIB, PAGE = 1
SpicRegsFile : > SPIC, PAGE = 1
SpidRegsFile : > SPID, PAGE = 1

DevCfgRegsFile : > DEV_CFG, PAGE = 1
ClkCfgRegsFile : > CLK_CFG, PAGE = 1
CpuSysRegsFile : > CPU_SYS, PAGE = 1

SyncSocRegsFile : > SYNC_SOC, PAGE = 1

WdRegsFile : > WD, PAGE = 1

XintRegsFile : > XINT PAGE = 1
MemCfgRegs : > MEMCFG PAGE = 1

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

If my project appears to use multiple cmd files, would a second cmd file cause the issue?  I'm new to this sort of programming

Philip,

What you posted is for the register mapping (F2837xD_Headers_nonBIOS_cpu1.cmd).  That is default - no changes should be done in that.

There should be another cmd file.  That maps different sections to memories.  This has two flavors:

• Flash linker cmd - one maps all code/initialized-data to flash. 
• RAM linker cmd - Maps everything to RAM.

Take a look here: C2000Ware_3_04_00_00\device_support\f2837xd\common\cmd

You can start with 2837xD_FLASH_lnk_cpu1.cmd - This is the basic generic flash linker cmd file.

Thanks and regards,
Vamsi

Maybe this is what you mean?  I'm still unfamiliar with was sections would be mapping to flash and to ram.  Can't all the titles in this cmd file be made up?  How can I determine which addresses are RAM and which are FLASH memory sectors?

/**********************************************************************************

* Devices: TMS320F28379D
* Author: Modifed from Texas Instruments Files
**********************************************************************************/

MEMORY
{
PAGE 0:    /* Program Memory */
   BEGIN_M0            : origin = 0x000000, length = 0x000002     /* Part of M0 RAM - used for "Boot to M0" bootloader mode */
   RAMLS3              : origin = 0x009000, length = 0x001800     /* L3 RAM, DCSM secure, CLA Data RAM */
   //RAMLS4              : origin = 0x00A000, length = 0x000800     /* L4 RAM, DCSM secure, CLA Program RAM */
   RAMLS5              : origin = 0x00A800, length = 0x000800     /* L5 RAM, DCSM secure, CLA Program RAM */
   RAMGS0123           : origin = 0x00C000, length = 0x004000     /* GS0- 3 Parity, DMA */
   BEGIN_FLASH         : origin = 0x080000, length = 0x000002     /* Part of FLASH Sector A - used for "Jump to flash" bootloader mode */
   FLASH_A             : origin = 0x080002, length = 0x001FFE     /* Part of FLASH Sector A - DCSM secure */
   FLASH_BCDEFGHIJKLMN : origin = 0x082000, length = 0x03E000     /* FLASH Sectors B,C,D,E,F,G,H,I,J,K,L,M,N combined - DCSM secure */
   RESET           (R) : origin = 0x3FFFC0, length = 0x000002     /* Part of Boot ROM */
   RAMGS89ABCDEF       : origin = 0x014000, length = 0x008000     /* GS8-15 RAM, Parity, DMA */

PAGE 1:    /* Data Memory */
   BOOT_RSVD           : origin = 0x000002, length = 0x00004E     /* Part of M0 RAM, BOOT rom will use this for stack */
   RAMM0               : origin = 0x000050, length = 0x0003B0     /* M0 RAM */
   RAMM1               : origin = 0x000400, length = 0x000400     /* M1 RAM */
   CLA1_MSGRAMLOW      : origin = 0x001480, length = 0x000080     /* CLA to CPU Message RAM, DCSM secure */
   CLA1_MSGRAMHIGH     : origin = 0x001500, length = 0x000080     /* CPU to CLA Message RAM, DCSM secure */
   RAMLS0              : origin = 0x008000, length = 0x000800     /* L0 RAM, DCSM secure, CLA Data RAM */
   RAMLS1              : origin = 0x008800, length = 0x000800     /* L1 RAM, DCSM secure, CLA Data RAM */
   //Removing to expand RAMLS3 //RAMLS2              : origin = 0x009000, length = 0x000800     /* L2 RAM, DCSM secure, CLA Data RAM */
   RAMD0               : origin = 0x00B000, length = 0x000800     /* D0 RAM, DCSM secure, ECC */
   RAMD1               : origin = 0x00B800, length = 0x000800     /* D1 RAM, DCSM secure, ECC */
   RAMGS4              : origin = 0x010000, length = 0x001000     /* GS4 RAM, Parity, DMA */
   RAMGS5              : origin = 0x011000, length = 0x001000     /* GS5 RAM, Parity, DMA */
   RAMGS6              : origin = 0x012000, length = 0x001000     /* GS6 RAM, Parity, DMA */
   RAMGS7              : origin = 0x013000, length = 0x001000     /* GS7 RAM, Parity, DMA */
   FLASHL            : origin = 0x0BA000, length = 0x002000   /* on-chip Flash */

}

 
SECTIONS
{
/*** Compiler Required Sections ***/

  /* Program memory (PAGE 0) sections */
  // .text               : > RAMGS0123,             PAGE = 0
  // .cinit              : > RAMGS0123,             PAGE = 0
  // .const              : > RAMGS0123,             PAGE = 0
  // .econst             : > RAMGS0123,             PAGE = 0
  // .pinit              : > RAMGS0123,             PAGE = 0
  // .reset              : > RESET,                 PAGE = 0, TYPE = DSECT  /* Not using the .reset section */
  // .switch             : > RAMGS0123,             PAGE = 0
   .text               : > FLASH_BCDEFGHIJKLMN,             PAGE = 0
   .cinit              : > FLASH_BCDEFGHIJKLMN,             PAGE = 0
   .const              : > FLASH_BCDEFGHIJKLMN,             PAGE = 0
   .econst             : > FLASH_BCDEFGHIJKLMN,             PAGE = 0
   .pinit              : > FLASH_BCDEFGHIJKLMN,             PAGE = 0
   .reset              : > RESET,                 PAGE = 0, TYPE = DSECT  /* Not using the .reset section */
   .switch             : > FLASH_BCDEFGHIJKLMN,             PAGE = 0
   //
   //Load tables to Flash and copy over to RAM
   //
   CLA1mathTables    :  LOAD = FLASHL,
                        RUN = RAMLS0,
                        RUN_START(_CLA1mathTablesRunStart),
                        LOAD_START(_CLA1mathTablesLoadStart),
                        LOAD_SIZE(_CLA1mathTablesLoadSize),
                        PAGE = 1

  /* Data Memory (PAGE 1) sections */
   .bss                : > RAMM0,                 PAGE = 1
 //  .ebss               : > RAMM0,                 PAGE = 1
   .ebss               : > RAMGS4,                  PAGE = 1
   .cio                : > RAMM0,                 PAGE = 1
   .stack              : > RAMM1,                 PAGE = 1
   .sysmem             : > RAMM1,                 PAGE = 1
   .esysmem            : > RAMM1,                 PAGE = 1

/*** CLA Compiler Required Sections ***/
   .scratchpad         : > RAMLS0,                PAGE = 1                /* Scratchpad memory for the CLA C Compiler */

/*** User Defined Sections ***/
   //codestart           : > BEGIN_M0,           PAGE = 0
   codestart           : > BEGIN_FLASH,           PAGE = 0                /* Used by file CodeStartBranch.asm */
   dmaMemBufs          : > RAMGS4,                PAGE = 1                /* Link to DMA accessible memory */
   Cla1ToCpuMsgRAM     : > CLA1_MSGRAMLOW,        PAGE = 1                /* Link to CLA Message RAM */
   CpuToCla1MsgRAM     : > CLA1_MSGRAMHIGH,       PAGE = 1                /* Link to CLA Message RAM */
   Cla1Data1           : > RAMLS1,                PAGE = 1                /* Link to CLA Data RAM */
   // Removed to expand program data space //Cla1Data2           : > RAMLS2,                PAGE = 1                /* Link to CLA Data RAM */

   /* Section secureRamFuncs used by file Flash.c. */
   secureRamFuncs      :  LOAD = FLASH_BCDEFGHIJKLMN, PAGE = 0            /* Load to flash, run from DCSM secure RAM */
                          RUN = RAMLS5,               PAGE = 0
                          LOAD_START(_secureRamFuncs_loadstart),
                          LOAD_SIZE(_secureRamFuncs_loadsize),
                          RUN_START(_secureRamFuncs_runstart)

   /* Section Cla1Prog used by file Cla.c */
   Cla1Prog            :  LOAD = FLASH_BCDEFGHIJKLMN, PAGE = 0            /* Load to flash, run from CLA Program RAM */
                          RUN_START(_Cla1Prog_Start)
                          RUN = RAMLS3,               PAGE = 0
                          LOAD_START(_cla1Funcs_loadstart),
                          LOAD_SIZE(_cla1Funcs_loadsize),
                          RUN_START(_cla1Funcs_runstart)

  /* Section RamFuncs */
   RamFuncs            :  LOAD = FLASH_BCDEFGHIJKLMN, PAGE = 0            /* Load to flash, run from CLA Program RAM */
                          RUN_START(_RamFunc_Start)
                          RUN = RAMGS89ABCDEF,        PAGE = 0
                          LOAD_START(_RamFuncs_loadstart),
                          LOAD_SIZE(_RamFuncs_loadsize),
                          RUN_START(_RamFuncs_runstart)

}

/******************* end of file ************************/

Is the issue in the "Memory" part of the cmd file or the "Sections" part of the cmd file?  In addition, how will I know if it's loading to RAM or FLASH.  Is there a document that describes which addresses belong to either?

Philip,

Datasheet should have a memory map table - that gives the address ranges for Flash and RAM.  Please review it.

Did you take a look at the linker cmd file that I suggested?  In that you can see that "sections" are mapped to flash address ranges that are defined in the "Memory".

Also, please take a look at this:  software-dl.ti.com/.../c2000_c28x-compiler-understanding-linking.html    

Thanks and regards,
Vamsi

I've compared what I just posted as my linker file to your example and tried to look at the documents you've sent.  It's still not clear.  What sections in my linker am I assigning to RAM?  I don't understand

Philip,

The error address from your snapshot is 0x7C88.  It is GPIO control register space as per the F2837xD_Headers_nonBIOS_cpu1.cmd.  

Below is the corresponding snap for memory range (GPIOCTRL) declaration:

And you can see below that the corresponding register structure is assigned to that address range.  As you can see it is configured as type=NOINT - Non initialized.  

What is the C2000Ware version that you are using?  Please use the latest one.  That should have "type=NOINT".  

Another link that can help understand the linker: https://software-dl.ti.com/ccs/esd/documents/sdto_cgt_Linker-Command-File-Primer.html 

Thanks and regards,

Vamsi

I'm using C2000Ware 3_03_00_00.  Changing the F2837xd_headers_nonBios_cpu1.cmd did not change the issue.  I've attached F2837xD_headers_nonBios_cpu1.cmd that I used and the error I still receive when loading.

MEMORY
{
 PAGE 0:    /* Program Memory */
 PAGE 1:    /* Data Memory */
   ACCESSPROTECTION           : origin = 0x0005F4C0, length = 0x00000040
   ADCA                       : origin = 0x00007400, length = 0x00000080
   ADCB                       : origin = 0x00007480, length = 0x00000080
   ADCC                       : origin = 0x00007500, length = 0x00000080
   ADCD                       : origin = 0x00007580, length = 0x00000080
   ADCARESULT                 : origin = 0x00000B00, length = 0x00000018
   ADCBRESULT                 : origin = 0x00000B20, length = 0x00000018
   ADCCRESULT                 : origin = 0x00000B40, length = 0x00000018
   ADCDRESULT                 : origin = 0x00000B60, length = 0x00000018
   ANALOGSUBSYS               : origin = 0x0005D180, length = 0x00000048
   CANA                       : origin = 0x00048000, length = 0x00000200
   CANB                       : origin = 0x0004A000, length = 0x00000200
   CLA1                       : origin = 0x00001400, length = 0x00000080
   CLB1DATAEXCH               : origin = 0x00003200, length = 0x00000200
   CLB2DATAEXCH               : origin = 0x00003600, length = 0x00000200
   CLB3DATAEXCH               : origin = 0x00003A00, length = 0x00000200
   CLB4DATAEXCH               : origin = 0x00003E00, length = 0x00000200
   CLB1LOGICCFG               : origin = 0x00003000, length = 0x00000052
   CLB2LOGICCFG               : origin = 0x00003400, length = 0x00000052
   CLB3LOGICCFG               : origin = 0x00003800, length = 0x00000052
   CLB4LOGICCFG               : origin = 0x00003C00, length = 0x00000052
   CLB1LOGICCTRL              : origin = 0x00003100, length = 0x00000040
   CLB2LOGICCTRL              : origin = 0x00003500, length = 0x00000040
   CLB3LOGICCTRL              : origin = 0x00003900, length = 0x00000040
   CLB4LOGICCTRL              : origin = 0x00003D00, length = 0x00000040
   CLBXBAR                    : origin = 0x00007A40, length = 0x00000040
   CLKCFG                     : origin = 0x0005D200, length = 0x00000032
   CMPSS1                     : origin = 0x00005C80, length = 0x00000020
   CMPSS2                     : origin = 0x00005CA0, length = 0x00000020
   CMPSS3                     : origin = 0x00005CC0, length = 0x00000020
   CMPSS4                     : origin = 0x00005CE0, length = 0x00000020
   CMPSS5                     : origin = 0x00005D00, length = 0x00000020
   CMPSS6                     : origin = 0x00005D20, length = 0x00000020
   CMPSS7                     : origin = 0x00005D40, length = 0x00000020
   CMPSS8                     : origin = 0x00005D60, length = 0x00000020
   CPUTIMER0                  : origin = 0x00000C00, length = 0x00000008
   CPUTIMER1                  : origin = 0x00000C08, length = 0x00000008
   CPUTIMER2                  : origin = 0x00000C10, length = 0x00000008
   CPUSYS                     : origin = 0x0005D300, length = 0x00000082
   DACA                       : origin = 0x00005C00, length = 0x00000008
   DACB                       : origin = 0x00005C10, length = 0x00000008
   DACC                       : origin = 0x00005C20, length = 0x00000008
   DCSMCOMMON                 : origin = 0x0005F070, length = 0x00000008
   DCSMZ1                     : origin = 0x0005F000, length = 0x00000030
   DCSMZ2                     : origin = 0x0005F040, length = 0x00000030
   DEVCFG                     : origin = 0x0005D000, length = 0x0000012E
   DMACLASRCSEL               : origin = 0x00007980, length = 0x0000001A
   DMA                        : origin = 0x00001000, length = 0x00000200
   ECAP1                      : origin = 0x00005000, length = 0x00000020
   ECAP2                      : origin = 0x00005020, length = 0x00000020
   ECAP3                      : origin = 0x00005040, length = 0x00000020
   ECAP4                      : origin = 0x00005060, length = 0x00000020
   ECAP5                      : origin = 0x00005080, length = 0x00000020
   ECAP6                      : origin = 0x000050A0, length = 0x00000020
   EMIF1CONFIG                : origin = 0x0005F480, length = 0x00000020
   EMIF2CONFIG                : origin = 0x0005F4A0, length = 0x00000020
   EMIF1                      : origin = 0x00047000, length = 0x00000070
   EMIF2                      : origin = 0x00047800, length = 0x00000070
   EPWM1                      : origin = 0x00004000, length = 0x00000100
   EPWM2                      : origin = 0x00004100, length = 0x00000100
   EPWM3                      : origin = 0x00004200, length = 0x00000100
   EPWM4                      : origin = 0x00004300, length = 0x00000100
   EPWM5                      : origin = 0x00004400, length = 0x00000100
   EPWM6                      : origin = 0x00004500, length = 0x00000100
   EPWM7                      : origin = 0x00004600, length = 0x00000100
   EPWM8                      : origin = 0x00004700, length = 0x00000100
   EPWM9                      : origin = 0x00004800, length = 0x00000100
   EPWM10                     : origin = 0x00004900, length = 0x00000100
   EPWM11                     : origin = 0x00004A00, length = 0x00000100
   EPWM12                     : origin = 0x00004B00, length = 0x00000100
   EPWMXBAR                   : origin = 0x00007A00, length = 0x00000040
   EQEP1                      : origin = 0x00005100, length = 0x00000022
   EQEP2                      : origin = 0x00005140, length = 0x00000022
   EQEP3                      : origin = 0x00005180, length = 0x00000022
   FLASH0CTRL                 : origin = 0x0005F800, length = 0x00000182
   FLASH0ECC                  : origin = 0x0005FB00, length = 0x00000028
   FLASHPUMPSEMAPHORE         : origin = 0x00050024, length = 0x00000002
   GPIOCTRL                   : origin = 0x00007C00, length = 0x00000180
   GPIODATA                   : origin = 0x00007F00, length = 0x00000030
   I2CA                       : origin = 0x00007300, length = 0x00000022
   I2CB                       : origin = 0x00007340, length = 0x00000022
   INPUTXBAR                  : origin = 0x00007900, length = 0x00000020
   IPC                        : origin = 0x00050000, length = 0x00000024
   MEMORYERROR                : origin = 0x0005F500, length = 0x00000040
   MEMCFG                     : origin = 0x0005F400, length = 0x00000080
   MCBSPA                     : origin = 0x00006000, length = 0x00000024
   MCBSPB                     : origin = 0x00006040, length = 0x00000024
   NMIINTRUPT                 : origin = 0x00007060, length = 0x00000007
   OUTPUTXBAR                 : origin = 0x00007A80, length = 0x00000040
   PIECTRL                    : origin = 0x00000CE0, length = 0x0000001A
   PIEVECTTABLE               : origin = 0x00000D00, length = 0x00000200
   ROMPREFETCH                : origin = 0x0005E608, length = 0x00000002
   ROMWAITSTATE               : origin = 0x0005F540, length = 0x00000002
   SCIA                       : origin = 0x00007200, length = 0x00000010
   SCIB                       : origin = 0x00007210, length = 0x00000010
   SCIC                       : origin = 0x00007220, length = 0x00000010
   SCID                       : origin = 0x00007230, length = 0x00000010
   SDFM1                      : origin = 0x00005E00, length = 0x00000080
   SDFM2                      : origin = 0x00005E80, length = 0x00000080
   SPIA                       : origin = 0x00006100, length = 0x00000010
   SPIB                       : origin = 0x00006110, length = 0x00000010
   SPIC                       : origin = 0x00006120, length = 0x00000010
   SYNCSOC                    : origin = 0x00007940, length = 0x00000006
   UPP                        : origin = 0x00006200, length = 0x00000048
   WD                         : origin = 0x00007000, length = 0x0000002B
   XBAR                       : origin = 0x00007920, length = 0x00000020
   XINT                       : origin = 0x00007070, length = 0x0000000B

}


SECTIONS
{
/*** PIE Vect Table and Boot ROM Variables Structures ***/
UNION run = PIEVECTTABLE
{
    PieVectTableFile      : TYPE=DSECT
    GROUP
    {
        EmuKeyVar         : TYPE=DSECT
        EmuBModeVar       : TYPE=DSECT
        EmuBootPinsVar    : TYPE=DSECT
        FlashCallbackVar  : TYPE=DSECT
        FlashScalingVar   : TYPE=DSECT
    }
}

   AccessProtectionRegsFile   : > ACCESSPROTECTION, type=NOINIT
   AdcaRegsFile               : > ADCA, type=NOINIT
   AdcbRegsFile               : > ADCB, type=NOINIT
   AdccRegsFile               : > ADCC, type=NOINIT
   AdcdRegsFile               : > ADCD, type=NOINIT
   AdcaResultRegsFile         : > ADCARESULT, type=NOINIT
   AdcbResultRegsFile         : > ADCBRESULT, type=NOINIT
   AdccResultRegsFile         : > ADCCRESULT, type=NOINIT
   AdcdResultRegsFile         : > ADCDRESULT, type=NOINIT
   AnalogSubsysRegsFile       : > ANALOGSUBSYS, type=NOINIT
   CanaRegsFile               : > CANA, type=NOINIT
   CanbRegsFile               : > CANB, type=NOINIT
   Cla1RegsFile               : > CLA1, type=NOINIT
   Clb1DataExchRegsFile       : > CLB1DATAEXCH, type=NOINIT
   Clb2DataExchRegsFile       : > CLB2DATAEXCH, type=NOINIT
   Clb3DataExchRegsFile       : > CLB3DATAEXCH, type=NOINIT
   Clb4DataExchRegsFile       : > CLB4DATAEXCH, type=NOINIT
   Clb1LogicCfgRegsFile       : > CLB1LOGICCFG, type=NOINIT
   Clb2LogicCfgRegsFile       : > CLB2LOGICCFG, type=NOINIT
   Clb3LogicCfgRegsFile       : > CLB3LOGICCFG, type=NOINIT
   Clb4LogicCfgRegsFile       : > CLB4LOGICCFG, type=NOINIT
   Clb1LogicCtrlRegsFile      : > CLB1LOGICCTRL, type=NOINIT
   Clb2LogicCtrlRegsFile      : > CLB2LOGICCTRL, type=NOINIT
   Clb3LogicCtrlRegsFile      : > CLB3LOGICCTRL, type=NOINIT
   Clb4LogicCtrlRegsFile      : > CLB4LOGICCTRL, type=NOINIT
   ClbXbarRegsFile            : > CLBXBAR, type=NOINIT
   ClkCfgRegsFile             : > CLKCFG, type=NOINIT
   Cmpss1RegsFile             : > CMPSS1, type=NOINIT
   Cmpss2RegsFile             : > CMPSS2, type=NOINIT
   Cmpss3RegsFile             : > CMPSS3, type=NOINIT
   Cmpss4RegsFile             : > CMPSS4, type=NOINIT
   Cmpss5RegsFile             : > CMPSS5, type=NOINIT
   Cmpss6RegsFile             : > CMPSS6, type=NOINIT
   Cmpss7RegsFile             : > CMPSS7, type=NOINIT
   Cmpss8RegsFile             : > CMPSS8, type=NOINIT
   CpuTimer0RegsFile          : > CPUTIMER0, type=NOINIT
   CpuTimer1RegsFile          : > CPUTIMER1, type=NOINIT
   CpuTimer2RegsFile          : > CPUTIMER2, type=NOINIT
   CpuSysRegsFile             : > CPUSYS, type=NOINIT
   DacaRegsFile               : > DACA, type=NOINIT
   DacbRegsFile               : > DACB, type=NOINIT
   DaccRegsFile               : > DACC, type=NOINIT
   DcsmCommonRegsFile         : > DCSMCOMMON, type=NOINIT
   DcsmZ1RegsFile             : > DCSMZ1, type=NOINIT
   DcsmZ2RegsFile             : > DCSMZ2, type=NOINIT
   DevCfgRegsFile             : > DEVCFG, type=NOINIT
   DmaClaSrcSelRegsFile       : > DMACLASRCSEL, type=NOINIT
   DmaRegsFile                : > DMA, type=NOINIT
   ECap1RegsFile              : > ECAP1, type=NOINIT
   ECap2RegsFile              : > ECAP2, type=NOINIT
   ECap3RegsFile              : > ECAP3, type=NOINIT
   ECap4RegsFile              : > ECAP4, type=NOINIT
   ECap5RegsFile              : > ECAP5, type=NOINIT
   ECap6RegsFile              : > ECAP6, type=NOINIT
   Emif1ConfigRegsFile        : > EMIF1CONFIG, type=NOINIT
   Emif2ConfigRegsFile        : > EMIF2CONFIG, type=NOINIT
   Emif1RegsFile              : > EMIF1, type=NOINIT
   Emif2RegsFile              : > EMIF2, type=NOINIT
   EPwm1RegsFile              : > EPWM1, type=NOINIT
   EPwm2RegsFile              : > EPWM2, type=NOINIT
   EPwm3RegsFile              : > EPWM3, type=NOINIT
   EPwm4RegsFile              : > EPWM4, type=NOINIT
   EPwm5RegsFile              : > EPWM5, type=NOINIT
   EPwm6RegsFile              : > EPWM6, type=NOINIT
   EPwm7RegsFile              : > EPWM7, type=NOINIT
   EPwm8RegsFile              : > EPWM8, type=NOINIT
   EPwm9RegsFile              : > EPWM9, type=NOINIT
   EPwm10RegsFile             : > EPWM10, type=NOINIT
   EPwm11RegsFile             : > EPWM11, type=NOINIT
   EPwm12RegsFile             : > EPWM12, type=NOINIT
   EPwmXbarRegsFile           : > EPWMXBAR, type=NOINIT
   EQep1RegsFile              : > EQEP1, type=NOINIT
   EQep2RegsFile              : > EQEP2, type=NOINIT
   EQep3RegsFile              : > EQEP3, type=NOINIT
   Flash0CtrlRegsFile         : > FLASH0CTRL, type=NOINIT
   Flash0EccRegsFile          : > FLASH0ECC, type=NOINIT
   FlashPumpSemaphoreRegsFile : > FLASHPUMPSEMAPHORE, type=NOINIT
   GpioCtrlRegsFile           : > GPIOCTRL, type=NOINIT
   GpioDataRegsFile           : > GPIODATA, type=NOINIT
   I2caRegsFile               : > I2CA, type=NOINIT
   I2cbRegsFile               : > I2CB, type=NOINIT
   InputXbarRegsFile          : > INPUTXBAR, type=NOINIT
   IpcRegsFile                : > IPC, type=NOINIT
   MemoryErrorRegsFile        : > MEMORYERROR, type=NOINIT
   MemCfgRegsFile             : > MEMCFG, type=NOINIT
   McbspaRegsFile             : > MCBSPA, type=NOINIT
   McbspbRegsFile             : > MCBSPB, type=NOINIT
   NmiIntruptRegsFile         : > NMIINTRUPT, type=NOINIT
   OutputXbarRegsFile         : > OUTPUTXBAR, type=NOINIT
   PieCtrlRegsFile            : > PIECTRL, type=NOINIT
   PieVectTableFile           : > PIEVECTTABLE, type=NOINIT
   RomPrefetchRegsFile        : > ROMPREFETCH, type=NOINIT
   RomWaitStateRegsFile       : > ROMWAITSTATE, type=NOINIT
   SciaRegsFile               : > SCIA, type=NOINIT
   ScibRegsFile               : > SCIB, type=NOINIT
   ScicRegsFile               : > SCIC, type=NOINIT
   ScidRegsFile               : > SCID, type=NOINIT
   Sdfm1RegsFile              : > SDFM1, type=NOINIT
   Sdfm2RegsFile              : > SDFM2, type=NOINIT
   SpiaRegsFile               : > SPIA, type=NOINIT
   SpibRegsFile               : > SPIB, type=NOINIT
   SpicRegsFile               : > SPIC, type=NOINIT
   SyncSocRegsFile            : > SYNCSOC, type=NOINIT
   UppRegsFile                : > UPP, type=NOINIT
   WdRegsFile                 : > WD, type=NOINIT
   XbarRegsFile               : > XBAR, type=NOINIT
   XintRegsFile               : > XINT, type=NOINIT
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/