Cannot clear FIFO interrupt flag (TXFFINT) on F28035

Hello, I am trying to use the I2C module on the Piccolo Experimenter's Kit F28035. I would like to let the FIFOs handle the data and the interrupts and then generate the stop condition manually by setting STP to 1 in the I2CMDR register. I believe that this should be possible, but I am experiencing issues clearing the TXFFINT flag. Here is what I have tried doing with just the transmitter: // Setup the I2C TX FIFO I2caRegs.I2CFFTX.bit.TXFFIL = 2; // Set number of bytes to reasonable value I2caRegs.I2CFFTX.bit.I2CFFEN = 1; // Enable the I2C FIFO mode I2caRegs.I2CFFTX.bit.TXFFRST = 0; // Keep FIFO in reset I2caRegs.I2CFFTX.bit.TXFFINTCLR = 1; // Clear TXFFINT flag I2caRegs.I2CFFTX.bit.TXFFRST = 1; // Enable the transmit FIFO operation (taken out of reset) I2caRegs.I2CFFTX.bit.TXFFINTCLR = 1; // Clear TXFFINT flag I2caRegs.I2CFFTX.bit.TXFFIENA = 1; // Enable FIFO interrupt Then proceed to load FIFO register. The moment that the TXFFRST is set to 1, the FIFO interrupt flag gets set and stays set. Even trying to clear the flag with the TXFFINTCLR bit doesn't work. The I2C datasheet says that when the I2C module is in repeat mode (RM) then it ignores the I2CCNT value and should generate the interrupt when the FIFO becomes empty. When the TXFFST4-0 bits reach a value equal to or less than the TXFFIL4-0 bits, the TXFFINT flag will be set. This condition seems that it will always be true and that the flag will always be set. I would like to manually clear the FIFO interrupt flag and set the STP bit in the ISR. Any help is much appreciated. -Matt