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TMS320F28032: Add ERTM to the first Line in the Main function, will affect the chip's functionality ?

Shaoxing Ke
Expert 3590 points
Part Number: TMS320F28032
Other Parts Discussed in Thread: C2000WARE

Hi Experts，

   Now the customer is having a strange problem, the F28032 chip has been working well, however the power-on is not working properly now. The reason for the initial positioning is that ERTM is added to the Main function.

   When adding ERTM to the Main function can affect the chip’s normal operation. However, the ERTM  is not added to Main the chip F28032 power up and function normally.

   So, I want to know what ERTM does, or how to use it? are there any more references about  ERTM impact hardware or other code software?
   And I check the manual, ERTM is equivalent t0 "clrc DBGM" instruction which is required to allow real time access to emulator in order to access memory & registers.

   I want to confirm somethings with you:

   1. The usage of ERTM, Before or after an ISR is required？ Limitations on ERTM usage

   2. When using ERTM, will there be an impact to chip or to other code without the JTAG emulator attached?

   Because the customer does not shield ERTM inside the code, and when the emulator is connected, the chip is powered up properly and the code is functioning properly.

   3. Apart from the JTAG real-time emulation, can we see what mode the chip is in, is there another way to see what state the chip is in? Is the chip in emulation mode, or is it viewed in another way while it is running?

   For example, a watchdog flag can be used to see what state of the watchdog.

  • 0
    TI__Mastermind 21195 points

    Hi,

    ERTM is an instruction tat clears a bit in status register ST1 to enable real-time debug mode in the core. You can read more about this in Section 2.4 of the "CPU and Instruction Set Reference Guide".

    See this forum post for more information

    (+) Compiler/TMS320F2812: What is the ERTM instruction - C2000 microcontrollers forum - C2000Tm︎ microcontrollers - TI E2E support forums

    Regards,

    Ozino

  • 0 in reply to Ozino Odharo
    TI__Expert 3590 points

    Hi Ozino,

       Yes, I have read this information. And there is not enough information that can be presented.  The customer's question is whether ERTM can affect their code？

  • 0 in reply to Ozino Odharo
    TI__Expert 3590 points

    2. When using ERTM, will there be an impact to chip or to other code without the JTAG emulator attached?

  • 0
    TI__Expert 3590 points

    Hi Every one，

        Could you help me out? My question is not answered, and this case is very urgent!

  • 0 in reply to Shaoxing Ke
    TI__Mastermind 21195 points

    Shaoxing,

    I'm not sure if you had a chance to look at section2.4 in the document (spru430f) It states that 

    "The Debug enable mask bit. When DBGM is set, the emulator cannot access memory or registers in real time. The debugger cannot update its windows."

    "Before the CPU executes an interrupt service routine (ISR), it sets DBGM. When DBGM = 1, halt requests from the host processor and hardware breakpoints are ignored. If you want to single-step through or set breakpoints in a non-time-critical ISR, you must add a CLRC DBGM instruction at the beginning of the ISR."

    Are you looking to Enable Global realtime interrupt DBGM ? If so, you should call this directive right after  the EINT(Enable Global interrupt INTM) directive. You should note that DBGM is also set automatically during interrupt operations.

    Using the ERTM should not affect the code directly only the ability to enable debugging while interrupts are being executed.

  • 0 in reply to Ozino Odharo
    TI__Expert 3590 points

    This reference did not resolve my issue, and does the use of ERTM cause the chip to not function properly?

  • 0 in reply to Ozino Odharo
    TI__Expert 3590 points

    Hi Ozino，

        You mean if customer want to use ERTM, and customer also need to use EINT in front of it?

        Will using ERTM alone have the impact I have mentioned above? 

  • 0 in reply to Shaoxing Ke
    TI__Genius 11645 points

    Hi,

    I just got notified on this. Still trying to assimilate what the exact issue is.

    From what I can read so far,

    a. Initially customer code was working fine

    b. But adding ERTM at the beginning creates problems.

    Is that correct ?

    If the answer is yes,

      a. What is really happening, when you say its not working/power-on is not happening properly ?

      b. What is the customer intending to ?

    Sorry for too many questions :)

  • 0 in reply to KARTHIKEYAN RAJAMANICKAM
    TI__Expert 3590 points

    yes it is correct.

    Maybe the customer intending to these thing:

    1. Does the ERTM directive affect code in other parts? If not, hope you can provide a reasonable explanation(Better to have material support) to eliminate the customer’s confusion.
    2. Why does removing ERTM make the chip work?
  • 0 in reply to Ozino Odharo
    TI__Mastermind 21195 points

    Please check out this video that explains more about the realtime debug interrupts are setup and used https://www.youtube.com/watch?v=gVDRo9m-4ng

    See this example in C2000Ware that shows it in action (C:\ti\c2000\C2000Ware<version>\device_support\f2803x\examples\c28   called epqm_real-time_interrupts)

    Do note that the state of DBGM won’t have impact without the debugger connected.  Most, if not all, of our examples clear the DBGM bit during start-up initialization. 

    Can you explain more details about what you are observing when the directive is added to the source code? Can you provide details as to when and where in code you are attempting to use this directive?

    What are you observing when the emulator is connected?

    Can you try programming the device, power cycling, connect CCS, reset and then run. See if that makes a difference.

  • 0 in reply to Ozino Odharo
    TI__Expert 3590 points

    Hi Ozino,

        It does not appear this phenomenon every time, as described in my email. The customer feels that it can explain why the addition of ERTM will cause the chip to fail to work, because if the watchdog is not enabled, the chip falls into an infinite loop. But why it would enter one of the two interrupts(EMUINT_ISR and USER1_ISR) that is not enabled? For this reason, I did not find relevant materials to explain. 

  • 0 in reply to Shaoxing Ke
    TI__Mastermind 21195 points

    Hi, Shaoxing,

    Sounds like the interrupts in your example are not configured correctly. Please double check to ensure that your interrupts in your example are configured correctly. Do note that you can reference the interrupts example, sw_prioritized_interrupts, provided in C2000Ware for more information.

    Additionally, we have this document that explains how to debug and correct lllegal ISR. C28x Interrupt FAQ (ti.com)

    Regards,

    Ozino