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LAUNCHXL-F28379D: Right way for SPI Slave Interrupt based communication

Piyush Verma
Prodigy 30 points
Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: C2000WARE

Hello,

I have seen 4 driverlib example  of spi, but information I requreid is stil missing. 

I am having problem in crating bydirection communication between SPI Master & SPI SLAVE

Here I have some question as below,

  • SPI Slave Side
    • Is there any example for SPI SLAVE to receive and transmit interrupt based data with detection CS pin status to detect first byte. 
    • How to detect CS pin low, as CS is not used as GPIO, it's part of SPI_STEB ?
    • If I enable INT_SPIB_TX Iinterrupt then it's called again and again even when Master is not sending data.
      • What is right way to send data in Slave Mode ?
      • Should I use RX Interrupt to pu data in TX Buffer ?
      • Should I enable INT_SPIB_TX when CS pin low  and disable wiht CS_PIN Hight  ?

Thanks

Piyush Verma

  • 0
    TI__Mastermind 23610 points

    Hi Piyush,

    Piyush Verma said:
    Is there any example for SPI SLAVE to receive and transmit interrupt based data with detection CS pin status to detect first byte. 

    We only have an example that sets up a SPI module as the master (transmits data) and another module which is the SPI slave (receives data). 

    C:\ti\c2000\C2000Ware_version\driverlib\f2837xd\examples\cpu1\spi\spi_ex3_external_loopback_fifo_interrupts.c

    Piyush Verma said:
    How to detect CS pin low, as CS is not used as GPIO, it's part of SPI_STEB ?

    The SPI module will automatically handle the SPISTE signal. It is driven low by the master before transmitting data to the slave and is taken high after the transmission is complete. However, you can also use a GPIO if you prefer or have multiple SPI slaves.

    Please take a look at the 'Special Considerations' section of the 'SPI Module Signals' within the Technical Reference Manual

    Piyush Verma said:
    If I enable INT_SPIB_TX Iinterrupt then it's called again and again even when Master is not sending data

    Is SPI B your master or slave device? Do you have FIFOs enabled? 

    Piyush Verma said:
    Should I enable INT_SPIB_TX when CS pin low  and disable wiht CS_PIN Hight  ?

    In slave mode, data written to SPITXBUF is transmitted to the network when appropriate edges of the SPICLK signal are received from the network master. The TALK bit can also be checked to know whether the SPI module is able to transmit data.

    Best Regards,

    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    Prodigy 30 points
    Hi Marlyn,
    1. Ok understand there is no such example.
    2. My most important point is I have to detect start of transaction slave side by detecting cs pin status.
      • When CS pin goes from high to low I have to reset state machine to start.
      • usually it's done as setting CS and gpio and setting up an interrupt.
      • But in case of c2000 SPI Slave STEB must be connected to IO Pin so I can't use as GPIO.
      • SO what is solutionio to detect start of transaction ?
    3. Currently I am talking spi slave side, SPI Master controls the clock so a little drift is ok. but spi slave must to detect master clock and act accordingly.
      1. I have enabled FIFO both slave & master side.

    Regards

    Piyush

  • 0 in reply to Piyush Verma
    TI__Mastermind 23610 points

    Hi Piyush,

    Piyush Verma said:
    But in case of c2000 SPI Slave STEB must be connected to IO Pin so I can't use as GPIO

    The SPISTE pin does not need to be used. You can change the mux settings to make this pin a GPIO and drive it yourself with the implementation that you choose. 

    Best Regards,

    Marlyn