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Original question:

TMDSCNCD28035: Device Reset Procedure

TMS320F28035: Accidental device Restart

Gabriel Wang1
Genius 4865 points

Part Number: TMS320F28035

Dear Expert

Application: full bridge LLC closed loop control.

Customer mass production F28035PAGT.When PWM output is 200KHz, about 20% of the DSP machines in mass production will occasionally reset, which occurs about 20 minutes after normal operation at room temperature.

The customer suspects that their schematic design is defective, could you please help to provide advice?

Below is customer's schemetic.

  • 0
    TI__Mastermind 45606 points

    Hi Gabriel,

    Is there any additional circuitry connected to the XRS reset signal? Anything that could be driving the signal low to reset the device?

    Gabriel Wang1 said:
    Customer mass production F28035PAGT.When PWM output is 200KHz, about 20% of the DSP machines in mass production will occasionally reset, which occurs about 20 minutes after normal operation at room temperature.

    This sounds like it could be a power supply related issue. Is the current output of the 3.3V supply adequate for the system design?

    That or maybe the F2803x device IOs are needing to sink/source too much current which is causing the device to reset. Please see the device datasheet 7.1 Absolute Maximum Ratings and 7.4 Recommended Operating Conditions. Specifically the clamp current and output source/sink current specs. Maybe these are not being met.

    Best,

    Kevin

  • 0 in reply to Kevin Allen18
    Genius 4865 points

    Dear Kevin

    Thanks for your replying!

    Our Debug found that F28035 has watchdog reset, and it works normally after replacing the chip. The defective chip is re-attached to the normal PCB board, and the defective phenomenon is reset. What is the cause of the DSP failure?

  • 0 in reply to Gabriel Wang1
    TI__Mastermind 45606 points

    Hi Gabriel,

    For the problematic device have you confirmed it's a watchdog reset by checking the WDFLAG register bit? Or have you debugged this some other way?

    Best,

    Kevin

  • 0 in reply to Kevin Allen18
    TI__Guru* 95315 points

    Gabriel,

                    The datasheet says the following for X1 pin: "If this pin is not used, it must be tied to GND. (I) " However, I noticed that the X1 pin has been left unconnected in the schematics. This could be making some chips more vulnerable to noise.

    I also noticed that the design is using an external oscillator. Just as an experiment, could you use the on-chip INTOSC and disable the external oscillator? We can check if this make any difference.

    For the VDD pins, the datasheet suggests a minimum capacitance of 1.2 uF per pin but the design appears to use 1 uF.

    For the -XRS pin, the datasheet recommends 100 nF or smaller, but the design is using 1 uF. This is not causing the problem. However, this could impact the ability of the software to distinguish a WD reset from other types of reset. Please see this post  for more information.