TMS320F28075: CLB register and peripheral clock for ePWM not set within same EALLOW EDIS loop

Hi Team,

When I try to set peripheral clock for ePWM and CLB registers within same EALLOW and EDIS loop, the statement gets executed but the register values are not set. Let me know if this is an expected behaviour.

Please find below the details:

Case1 :

EALLOW;
CpuSysRegs.PCLKCR2.bit.EPWM1 = 1; -> register value set
Clb1LogicCtrlRegs.CLB_LOAD_EN.bit.GLOBAL_EN = 1;/* Enabling CLB tile 1 */ -> executes, no error but register not set
..
EDIS;


Case 2:

EALLOW;
Clb1LogicCtrlRegs.CLB_LOAD_EN.bit.GLOBAL_EN = 1;/* Enabling CLB tile 1 */ -> CLB1 registers properly set
..more CLB1 register settings
CpuSysRegs.PCLKCR2.bit.EPWM2 = 1; -> executes, no error but register not set
Clb2LogicCtrlRegs.CLB_LOAD_EN.bit.GLOBAL_EN = 1;/* Enabling CLB tile 2 */ -> executes, no error but CLB 2 registers not set
..more CLB2 register settings..
EDIS;


Case 3:
EALLOW;
CpuSysRegs.PCLKCR2.bit.EPWM1 = 1;
EDIS;
EALLOW;
Clb1LogicCtrlRegs.CLB_LOAD_EN.bit.GLOBAL_EN = 1;/* Enabling CLB tile 1 */
..more CLB1 register setting
EDIS;

All register set properly.

Kind regards,

Irene