- Ask a related questionWhat is a related question?A related question is a question created from another question. When the related question is created, it will be automatically linked to the original question.
Dear TI team,
We have our custom board using TMS320F28384D , our application is to write value in flash sector (Bzero_Sector6_start ) of regular interval 10secs..its working fine in running state,
while(program_start==1)
{
if(Write_Sec>=10){
spindle_parameter();
Flash_claimPumpSemaphore(FLASH_CPU1_WRAPPER);
EEPROM_Erase(Bzero_Sector6_start);
EEPROM_ProgramSingleByte(spindle1_parameter,12,Bzero_Sector6_start);
Flash_releasePumpSemaphore();
Write_Sec=0;}
}
but while I connect debugger in debug mode , we are facing a issue that erase sector function fails and processor gets hang( estop) in EEPROM_Erase(); function
Most case, while in debug mode works fine for 1 to 2 minute ..after that program get strucks in erase function.
processor struck in "oReturnCheck = Fapi_issueAsyncCommandWithAddress(Fapi_EraseSector,(uint32*)Bzero_SectorB_start2);"" please find function below.
//############################ EEPROM_ERASE_START- Sector C ######################################################################################
void EEPROM_Erase(uint32 ERASESECTOR)
{
DINT;
EALLOW;
uint32 Bzero_SectorB_start2;
Bzero_SectorB_start2= ERASESECTOR;
oReturnCheck = Fapi_issueAsyncCommandWithAddress(Fapi_EraseSector,(uint32*)Bzero_SectorB_start2);
//
// Wait until FSM is done with erase sector operation
//
while (Fapi_checkFsmForReady() != Fapi_Status_FsmReady){
}
// Read FMSTAT register contents to know the status of FSM after
// erase command to see if there are any erase operation related errors
//
oFlashStatus = Fapi_getFsmStatus();
if(oFlashStatus != 0)
{
//
// Check Flash API documentation for FMSTAT and debug accordingly
// Fapi_getFsmStatus() function gives the FMSTAT register contents.
// Check to see if any of the EV bit, ESUSP bit, CSTAT bit or
// VOLTSTAT bit is set (Refer to API documentation for more details).
//
__asm(" ESTOP0");
}
//
// Verify that SectorL is erased. The Erase step itself does a
// verify as it goes. This verify is a 2nd verification that can be done.
//
oReturnCheck = Fapi_doBlankCheck((uint32 *)Bzero_SectorB_start2,
Bzero_64KSector_u32length,
&oFlashStatusWord);
if(oReturnCheck != Fapi_Status_Success)
{
//
// Check Flash API documentation for possible errors
// If Erase command fails, use Fapi_getFsmStatus() function to get the
// FMSTAT register contents to see if any of the EV bit, ESUSP bit,
// CSTAT bit or VOLTSTAT bit is set (Refer to API documentation for
// more details)
//
Example_Error(oReturnCheck);
}
c1=4;
EDIS;
EINT;
}
kindly, help us to solve this issue and provide a solution
Thanks & Regards,
Ajay S
Ajay,
You are executing both the flash API and EEPROM_Erase from RAM - which is good.
When you say it halts at ESTOP-> Do you mean the ESTOP in the code snippet that you showed near the oFlashStatus check? OR is it ending up in a BootROM address? If it is a BootROM address, can you check if it falls in to any of the below ranges?
Regarding hard-coding: Sorry, I missed reading "Bzero_SectorB_start2= ERASESECTOR;" in your code. I now see that it is not hard-coded and is actually taking the parameter passed in for sector erase.
Please note: I am out of office up to March 3rd. Please expect delay in my response.
Thanks and regards,
Vamsi
Dear Vamsi,
Thanks for the response. As mentioned ,when the processor hangs in ERASE SECTOR Function.
step1:
initial code hangs in " oReturnCheck = Fapi_issueAsyncCommandWithAddress(Fapi_EraseSector,
(uint32*)Bzero_SectorB_start2);"
step2:
When forces the code execution to stepover.
step3:
when try to resume the code execution "RESUME"
NOTE: "CPU2 GETTING HELD IN RESET"
C28xx_CPU2: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
C28xx_CPU2: Trouble Reading Register PC: (Error -1137 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register RPC: (Error -1137 @ 0x13) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register ST1: (Error -1137 @ 0x6) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register PC: (Error -1137 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register RPC: (Error -1137 @ 0x13) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register ST1: (Error -1137 @ 0x6) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register PC: (Error -1137 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register RPC: (Error -1137 @ 0x13) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register ST1: (Error -1137 @ 0x6) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
C28xx_CPU2: Trouble Reading Register PC: (Error -1137 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)
"Is it ending up in a Bootrom address?"
Where we have to check the Bootrom address ,not yet checked out ? kindly help us and provide us solution.
As we have checked out with FAPI Technical reference manual,
our application need to erase and write 24bytes every 10secs once for 365days . Then also after from power failure we will retrieve the values. kindly suggest us lifetime of f28384d or need to go with external "SRAM".
Thanks& Regards,
Ajay S
Hi Ajay,
1) Address 0x3FE96F in your CCS debug window snapshot is the ITRAP ISR in BootROM space. Meaning, CPU executed an illegal opcode. Please make sure the flash API code and the EEPROM_Erase() are still intact in RAM when you notice this issue.
2) Regarding your flash erase usage: How many times is the sector erased in your application totally? It is not clear from your message. Below datasheet flash parameter spec table shows that a sector can be erased for a max of 20k times.
Thanks and regards,
Vamsi
Dear TI Team,
Hope u were back to work,
2. We are erasing sector every 10 secs once - for a minute 6 times for a whole 365 days, this means if we erase and write likewise . How long will be the lifecycle of sector? and How long will be life of processor ?
1.We are executing flash code with "ram function",Herewith attached linker file for your reference.
How we can check bootrom space and illegal code execution? Help us to solve the illegal code executed and resolve this error.
asm file:
After previous discussion we have changes done ,but it remains error same
Thanks&Regards
Ajay S
