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TMS320F280049C: CLLLC active synchronous rectification

huang bin
Prodigy 70 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: TIDM-02002

Hi,TI

    on the TIDM-02002 design , under the condition of  primary to second power flow, As active synchronous rectification scheme is used, the second PWMs falling edge is

controlled by the trip action that is triggered as soon as the secondary tank current reaches zero.

     can i configure the primary tank current or second current which connected to the battery instead of the second tank current to trip the second PWMs?

   

  • 0
    TI__Mastermind 42195 points

    Huang,

    I don't see any limitations from the C2000 device which would prevent you from tripping on different current measurements. That being said the hardware is built such that the rogowski coil is used to detect the Secondary side tank current. Obviously that coil/ measurement is not adjustable, but you should be able to configure other ADC/CMPSS resources to trip the Active Synch. Rect. Circuit.

    Can you help me understand why you want to trip off of the primary side tank current or the battery current?

    Reagrds,
    Cody 

  • 0 in reply to Cody Watkins
    Prodigy 70 points

         Can you help me understand why you want to trip off of the primary side tank current or the battery current?

    because i want to desing my project based on TIDM-02002, for saving the cost, i want to delete the secondary tank current measurement. 

    so, if i configure the primary side tank current or the battery current instead of secondary tank current to trip the PWMs, is there any influence

    i need consider?

  • 0 in reply to huang bin
    TI__Mastermind 42195 points

    Huang Bin,

    wouldn't you need to account for a potential unknown phase delay between the primary and secondary side currents? How would you know exactly when the secondary side current went to zero?

    Reagrds,
    Cody 

  • 0 in reply to Cody Watkins
    Prodigy 70 points

    i didn`t test the phase delay , the phase delay is varying with the high frequency transformer theoretically, so i quit using primary tank current to trip second PWMs.

    what about the battery current to trip second PWMs, is there phase delay betwwen the second tank current and the battery current when went to zero?

  • 0 in reply to huang bin
    TI__Mastermind 42195 points

    I am not sure if there would be a phase delay, but it would be unclear if the current would be coming from or going to the output capacitor if you simply looked at the V BATT current. I don't have enough knowledge to recommend this. I would try searching for scholarly articles on alternative methods for zero crossing detection in CLLLC converters.

    Regards,
    Cody