Other Parts Discussed in Thread: C2000WARE, LAUNCHXL-F280049C
Hello ,
for the C2000ware Motor Control SDK, I am adapting the Universal Lab for the F280049C RSH chip on our own board.
The xtal is connected to the X1 and X2 in Pins 38 and 39 with the recommended capacitors.
The system clock should run at 100 MHz and the low speed clock at 25 MHz like in the LaunchXL-F280049C demos.
I have adapted the calls to SysCtl_setClock and SysCtl_setLowSpeedClock in hal.c like this:
SysCtl_setClock(SYSCTL_OSCSRC_XTAL |
SYSCTL_IMULT(10) |
SYSCTL_FMULT_NONE |
SYSCTL_SYSDIV(2) |
SYSCTL_PLL_ENABLE);
// Make sure the LSPCLK divider is set to divide by 2
SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_2); // 50MHz for SFRA, SPI&SCI
This is the same setting used in the LaunchXL-F280049C examples and there it works fine.
But here, checking the frequencies using SysCtl_getClock and SysCtl_getLowSpeedClock
gDebug1 = SysCtl_getClock(DEVICE_OSCSRC_FREQ);
gDebug2 = DEVICE_SYSCLK_FREQ;
gDebug3 = SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ);
gDebug4 = DEVICE_LSPCLK_FREQ;
results in:
If the DEBUG pre-define is set, this causes an error at the ASSERTS thereafter.
Any ideas what the issue could be?
Cheers,
John
