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Original question:

TMS320F28377D: Behavior of EMIF data lines

TMS320F28384D: EMIF Data Bus Parking Pull-up resistors?

Antenna_Head
Genius 13530 points

Part Number: TMS320F28384D
Other Parts Discussed in Thread: LAUNCHXL-F28379D

On behalf of customer.

PCB is in layout and working on the EMIF.

Regarding the pull-up resistors on the EMIF bus, I was planning to enable the GPIO pull up resistors for the EMIF data bus.  This excerpt [shown below] leads me to believe that I cannot do that, but instead must use external resistors.  Please confirm.  

In document TMS320F2838x Real-Time Microcontrollers With Connectivity Manager SPRUII0D – MAY 2019 – REVISED JULY 2022 , Tables 12-21 through 12-24 mention address becoming valid and address becoming invalid.  I understand address becoming valid but I am confused by address becoming invalid.  Does that mean that the address bits are no longer driven and become tristate. 

If the address bits are still driven, would they not remain unchanged until they become valid for the next memory access?  Do the address signals have the GPIO internal pull-up?  If so, should they be enabled?  If not, should they have external pull-up resistors?

Does TI have an eval board that used the EMIF bus?  If so, did that design have pull-up resistors on the data bus?  I do not see any timing diagrams for asynchronous memory read and write that show timing information for when the DSP drives and releases the data bus with regards to Data Bus Parking.

  • 0
    TI__Guru** 116981 points

    Hi,

    Antenna_Head said:
    This excerpt [shown below] leads me to believe that I cannot do that, but instead must use external resistors.  Please confirm.  

    Sorry, I am not clear what are you referring to here. Are you talking about data bus parking feature ? 

    Antenna_Head said:
    I understand address becoming valid but I am confused by address becoming invalid.  Does that mean that the address bits are no longer driven and become tristate. 

    No, it is not tristate but it just means value on address bus can not be sample that time. 

    Antenna_Head said:
    Does TI have an eval board that used the EMIF bus?  If so, did that design have pull-up resistors on the data bus?

    You can refer this app note for the same. I don't think we have any external pull on data pins. Any specific reason you plan to have it ?

    Regards,

    Vivek Singh 

  • 0 in reply to Vivek Singh
    TI__Genius 13530 points

    The first question is related to using the on-board GPIO pull-ups instead of external 10K pull-ups.  Is there a way to use the internal GPIO pull-ups on the EMIF pins to save parts?

    I will forward the app note to the customer- they were asking about t]he EVM to use it as a reference design in this regard only.

    -Steve

  • 0 in reply to Antenna_Head
    TI__Guru** 116981 points

    Hi,

    Antenna_Head said:
    The first question is related to using the on-board GPIO pull-ups instead of external 10K pull-ups.  Is there a way to use the internal GPIO pull-ups on the EMIF pins to save parts?

    Yes, you can enable internal pull-up by configuring  GPxPUD register. 

    Regards,

    Vivek Singh 

  • 0 in reply to Vivek Singh
    TI__Genius 13530 points

    Thanks, are these internal pull-up sufficient for the EMIF bus parking?  

    Per customer:

    I had previously found the LAUNCHXL-F28379D schematic.  Yesterday I found the EMIF DC schematic.  Neither board has pull-up resistors on the EMIF data bus.  I was unable to convince the Woodward team to add the pull-ups to the data bus as well. Now that I find that TI did not include them on there evaluation boards I am less concerned about paragraph 12.2.7 saying that the pull-up resistors are needed.  We will find out in about a month when we get our board assemblies.

     

                    As for the address bus, I am glad to hear that address becoming invalid does not mean the address bus goes tristate.

    Any other comments on the above?

    thanks!

    -Steve

  • 0 in reply to Antenna_Head
    TI__Guru** 116981 points

    Steve,

    Recommendation in section 12.2.7 is for specific scenario where user is using SDRAM interface along with ASYNC. Is that the case here ? Also the suggestion for pull-up is to avoid the floating input which will be taken care by internal pull-up. Statement in document clearly says that it's for EMIF pins which do not have internal pull -

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    TI__Genius 13530 points

    Thanks, they are not using SDRAM.

    According to Table 6-6 of the datasheet, it appears that all GPIO have internal pull capability:

    Just confirming this includes GPIO69:85 pins that are used for EMIF1_Dxx - please confirm these pins indeed have internal pull-ups per the table above.

    Thanks!

    -Steve

  • +1 in reply to Antenna_Head
    TI__Guru** 116981 points

    Steve,

    Yes, all the GPIO pins have internal pull-up which user can enable. By default pull-up is disable.

    Regards,

    Vivek Singh