TMS320F28379D: SCI-TMS320F28379D

Arya G Lal

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Hi,

I'm trying the code sci_ex1_echoback cpu1 and the corresponding code for cpu2 in the launchpad. I need to get sci access for cpu2. Since I'm using scib in launchpad, I replaced the scia portions with scib. But i'm stuck at the ipc flagset portion.

1. Please provide me the way of loading and running both CPUs.

2. Is there anything else i've to do in the code for accessing scib?

3. Is there anything to do to set CPUSEL5 for scib?

4. In launchpad how can i use scia pin?

Kindly excuse for these much doubts since I'm very new to this processor.

Regards,

Arya

over 3 years ago

0 Marlyn Rosales Castaneda20 over 3 years ago

TI__Mastermind 25780 points

Hi Arya,

Arya G Lal said:
1. Please provide me the way of loading and running both CPUs.

In this thread I discuss the steps you would take to load and run a dual cpu project: https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/949756/ccs-tms320f28377d-timer-interrupt-in-cpu2

Arya G Lal said:
2. Is there anything else i've to do in the code for accessing scib?

Which core will be configuring scib? If it is cpu2 then cpu2 needs to be given access to cpu2. Other than replacing the code portions, make sure to also configure SCI-B pins.

Arya G Lal said:
3. Is there anything to do to set CPUSEL5 for scib?

Can you please expand on this question?

Arya G Lal said:
4. In launchpad how can i use scia pin?

For scia, if you are using the sci_ex1_echoback cpu1 then you should just be able to connect the launchpad to the PC and open a terminal. Are you trying to do something different for scia?

Best Regards,

Marlyn

0 Arya G Lal over 3 years ago in reply to Marlyn Rosales Castaneda20

Prodigy 30 points

Hi,

Actually my requirement is to transfer data from SCIA/SCIB of custom made controller card using F28379D. We have already transferred data from SCIA by modifying the code sci echoback cpu1 of older version. Now we decided to use cpu2 core for communication and hence need to transfer data via scia/scib from cpu2. I tried the solution received an earlier post https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1121565/tms320f28379d-sci-tms320f28379d/4163835?tisearch=e2e-sitesearch&keymatch=%2520user%253A500422#4163835

so before testing my custom board, I tried the codes on f28379d launchpadxl. Now I tried the cod sci ex1 echoback of new version in the launchpad.

1. fisrt i connected cpu, then loaded cpu1.out.

2. then connected cpu 2 and loaded cpu2.0ut.

3. run cpu1 and then cpu 2.

4. cpu 1 was running well, but when i pause cpu2, the code came stuck at sci_isspace available portion, the screenshot of which is attached.

Please advice.

Regards,

Arya

0 Marlyn Rosales Castaneda20 over 3 years ago in reply to Arya G Lal

TI__Mastermind 25780 points

Hi Arya,

Arya G Lal said:
4. cpu 1 was running well, but when i pause cpu2, the code came stuck at sci_isspace available portion, the screenshot of which is attached.

Which core is using which SCI module, is CPU1 responsible for SCIA and CPU2 responsible for SCIB?

If you do not pause the program what happens on CPU2? It would be helpful if you could please describe how you intend the communication to work between the two cores.

Best Regards,

Marlyn

0 Arya G Lal over 3 years ago in reply to Marlyn Rosales Castaneda20

Prodigy 30 points

HI,

I need an external uart communication via SCIB module of CPU2. This is my main requirement. So in a simple way, what further steps I've to do?

Regards,

Arya

0 Marlyn Rosales Castaneda20 over 3 years ago in reply to Arya G Lal

TI__Mastermind 25780 points

Hi Arya,

Thank you, it would still be very helpful to understand what you are doing on CPU2.

- If you do not pause the program what happens on CPU2?

- Do you see any data output on SCIB TX Pin?

- What is connected to SCIB TX and RX Pins?

Did you give CPU2 access to SCI-B? Did you configure the correct pins for SCI-B? These are the two main steps required, giving CPU2 access to SCI-B, performing SCI-B configuration in CPU2 and then setting up the correct pins for the communication.

Best Regards,

Marlyn

0 Arya G Lal over 3 years ago in reply to Marlyn Rosales Castaneda20

Prodigy 30 points

Hi,

As I mentioned earlier, we have made a custom board using TMS320F28379D. We need to monitor some parameters received from ADC (external ADC) in this board via external UART. Initially, we modified the code “sci_echoback for cpu01” (C2000Ware_3_04_00_00) and succeeded in monitoring some dummy values sent via SCIA where we connected an FTDI cable with SCIA pins to monitor it on the hyperterminal.

Now we decided to use cpu01 for computation and cpu02 for communication. So, we need to run the same code in cpu02 only. That is, we have to use SCIA from cpu02 to monitor the parameters. I understand that SCI access is intended for cpu01 and we have to make sure to give CPU2 access to SCIA by

SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL5_SCI, 1, SYSCTL_CPUSEL_CPU2);

And configure the GPIO pins (GPIO64 and GPIO84 in custom board) accordingly.

So just to get an awareness we used C2000 LaunchPad XL, and tried the code sci_ex1_echoback_cpu1 and sci_ex1_echoback_cpu2. We connected the FTDI cable to SCIB (GPIO 18 and 19) to check with hyperterminal. Here the code was for SCIA and since we didn’t find any SCIA in launchpad, we edited the code and replaced SCIA with SCIB wherever required. But didn’t receive any output in the hyperterminal.

I’m really confused. Our priority is the custom board and the launchpad is just for testing only, so can you please suggest some point-by-point instruction it will be very helpful.

Regards,

Arya

0 Marlyn Rosales Castaneda20 over 3 years ago in reply to Arya G Lal

TI__Mastermind 25780 points

Hi Arya,

Arya G Lal said:
Our priority is the custom board and the launchpad is just for testing only

Lets focus on your custom board then.

Arya G Lal said:
So, we need to run the same code in cpu02 only. That is, we have to use SCIA from cpu02 to monitor the parameters. I understand that SCI access is intended for cpu01 and we have to make sure to give CPU2 access to SCIA by

SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL5_SCI, 1, SYSCTL_CPUSEL_CPU2);

And configure the GPIO pins (GPIO64 and GPIO84 in custom board) accordingly.

What you have described are the only differences you would have to implement. Did you setup IPC to ensure CPU1 was done with its initialization before CPU2 started configuring SCI-A? What other code do you have running on CPU2? I think it would be helpful to see how you have setup code on CPU2.

Note, you cannot take the entire code for sci_ex1_echoback_cpu1 and put it on cpu2. I would just take the sci-A configuration and code related to the transmit and receive operation.

Do you see the registers for SCI-A update based on your configuration? Is anything able to be transmitted on your custom board?

Best Regards,

Marlyn

0 Arya G Lal over 3 years ago in reply to Marlyn Rosales Castaneda20

Prodigy 30 points

Hi,

As I mentioned earlier, we modified the code “sci_echoback for cpu01” (C2000Ware_3_04_00_00) and succeeded in monitoring via SCIA from CPU01.

And I tried the same code in CPU02 where I added SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL5_SCI, 1, SYSCTL_CPUSEL_CPU2); in the initialization.

Did you setup IPC to ensure CPU1 was done with its initialization before CPU2 started configuring SCI-A?

No. Can you please explain how to set up the interprocessor communication?

Regards,

Arya

0 Arya G Lal over 3 years ago in reply to Arya G Lal

Prodigy 30 points

Fullscreen Code_arya.txt Download

//
// Main
//
void main(void)
{
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the F2837xD_SysCtrl.c file.
    //
       InitSysCtrl();
    //
    // Step 2. Initialize GPIO:
    // This example function is found in the F2837xD_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
   
       InitGpio();



    //LED////////////////////////////////////////
       GPIO_SetupPinMux(BLINKY_LED_GPIO, GPIO_MUX_CPU1, 0);  
       GPIO_SetupPinOptions(BLINKY_LED_GPIO, GPIO_OUTPUT, GPIO_PUSHPULL);
       GPIO_SetupPinMux(BLINKY_LED_GPIO1, GPIO_MUX_CPU1, 0);  
       GPIO_SetupPinOptions(BLINKY_LED_GPIO1, GPIO_OUTPUT, GPIO_PUSHPULL);


       
     //
    // For this example, only init the pins for the SCI-A port.
    //  GPIO_SetupPinMux() - Sets the GPxMUX1/2 and GPyMUX1/2 register bits
    //  GPIO_SetupPinOptions() - Sets the direction and configuration of the GPIOS
    // These functions are found in the F2837xD_Gpio.c file.
    //
   
 #ifdef scia  

//SCI-A UART
       GPIO_SetupPinMux(64, GPIO_MUX_CPU1, 6);                        //GPIO_SetupPinMux(43, GPIO_MUX_CPU1, 15); Rx 
       GPIO_SetupPinOptions(64, GPIO_INPUT, GPIO_PUSHPULL);          //GPIO_SetupPinOptions(43, GPIO_INPUT, GPIO_PUSHPULL);
       GPIO_SetupPinMux(84, GPIO_MUX_CPU1, 5);                      //GPIO_SetupPinMux(42, GPIO_MUX_CPU1, 15); Tx 
       GPIO_SetupPinOptions(84, GPIO_OUTPUT, GPIO_ASYNC);            //GPIO_SetupPinOptions(42, GPIO_OUTPUT, GPIO_ASYNC);

  #endif   

    #ifdef scib
//SCI-B UART
       GPIO_SetupPinMux(55, GPIO_MUX_CPU1, 6);                      //GPIO_SetupPinMux(19, GPIO_MUX_CPU1, 2); Rx 
       GPIO_SetupPinOptions(55, GPIO_INPUT, GPIO_PUSHPULL);         //GPIO_SetupPinOptions(19, GPIO_INPUT, GPIO_PUSHPULL);
       GPIO_SetupPinMux(54, GPIO_MUX_CPU1, 6);                      //GPIO_SetupPinMux(18, GPIO_MUX_CPU1, 2); Tx
       GPIO_SetupPinOptions(54, GPIO_OUTPUT, GPIO_ASYNC);           //GPIO_SetupPinOptions(18, GPIO_OUTPUT, GPIO_ASYNC);
    #endif
   
 #ifdef scic
//SCI-C UART
       GPIO_SetupPinMux(90, GPIO_MUX_CPU1, 6);                     //GPIO_SetupPinMux(139, GPIO_MUX_CPU1, 6); Rx Arya
       GPIO_SetupPinOptions(90, GPIO_INPUT, GPIO_PUSHPULL);        //GPIO_SetupPinOptions(139, GPIO_INPUT, GPIO_PUSHPULL);
       GPIO_SetupPinMux(89, GPIO_MUX_CPU1, 6);                      //GPIO_SetupPinMux(56, GPIO_MUX_CPU1, 6); Tx Arya
       GPIO_SetupPinOptions(89, GPIO_OUTPUT, GPIO_ASYNC);           //GPIO_SetupPinOptions(56, GPIO_OUTPUT, GPIO_ASYNC);
   
 #endif

0 Marlyn Rosales Castaneda20 over 3 years ago in reply to Arya G Lal

TI__Mastermind 25780 points

Hi Arya,

Please take a look at the cpu2 project for the sci echoback example:

C:\ti\c2000\C2000Ware_4_01_00_00\driverlib\f2837xd\examples\dual\sci

When you import the project into CCS, it actually imports a project for cpu1 and cpu2. This will show you how ipc is setup across the modules and how sci can be setup on cpu2.

Best Regards,

Marlyn

0 Arya G Lal over 3 years ago in reply to Marlyn Rosales Castaneda20

Prodigy 30 points

Hi,

Actually, I'm checking the same code for a while. As you mentioned, CPU1 and CPU2 code (two separate folders) were imported.

Like I mentioned in my earlier post, I've done the following steps.

1. fisrt i connected cpu 1, then loaded cpu1.out.

2. then connected cpu 2 and loaded cpu2.0ut.

3. run cpu1 and then cpu 2.

4. cpu 1 was running well, but when i pause cpu2, the code came stuck at sci_isspace available portion, the screenshot of which was already attached in this thread.

Kindly confirm whether the procedure is fine.

Regards,

arya

0 Marlyn Rosales Castaneda20 over 3 years ago in reply to Arya G Lal

TI__Mastermind 25780 points

Hi Arya,

The procedure outlined is the correct one. Would it be possible for you to test the sci code on CPU1 and see if that works okay?

Best Regards,

Marlyn

0 Arya G Lal over 3 years ago in reply to Marlyn Rosales Castaneda20

Prodigy 30 points

hi,

We've already tested the SCI code on CPU1 (the sci code which was give in the previous version C2000Ware_3_04_00_00), successfully.

Regards,

Arya

0 Marlyn Rosales Castaneda20 over 3 years ago in reply to Arya G Lal

TI__Mastermind 25780 points

Arya,

Are you able to see any output on the tx pins when the code is running in cpu2?

Best Regards,

Marlyn

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TMS320F28379D: SCI-TMS320F28379D