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TMS320F28075: IF3 Interrupt and Software Management - Availability in DriverLib

Chris Yorkey
Genius 15975 points
Part Number: TMS320F28075
Other Parts Discussed in Thread: C2000WARE

TI Friends & Family,

Hello all, previous posts such as the one listed below, bring the realization that TI’s drivers do not perhaps currently include access to the IF3 register.

But reading the available documentation does not explicitly suggest how to even develop the driver, since one cannot easily determine how to connect its activated interrupts to CAN line 1 or 0.

 Here is a similar situation in a forum:

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/582175/tms320f28075-if3-interrupt-and-management

 Any thoughts or input is welcomed very much.  Ideally if this were part of the C2000Ware DriverLib package, that would be great.  

Regards,

Chris

  • 0
    TI__Mastermind 36055 points

    Chris, 

    Will forward your query to a CAN expert. you should receive a response soon.

    Best Regards

    Siddharth

  • 0 in reply to Siddharth Deshpande
    TI__Genius 15975 points

    Thanks Siddharth,

    For now, as a workaround, we are discussing doing a polling method on the IF3 status register, but we really think information regarding this register in the manual is not very intuitive for whatever reason.

    In follow up, if we could learn more about the FIFO buffer that the IF3 can fill that would be helpful.  The manual does not specify the size of the buffer. We would also like to know if this FIFO can be filled out with messages coming from different nodes in the bus, as long as they specify that the message is not the last message received. We actually only see the FIFO functionality explained for the IF1 and IF2 registers.

     Thank you for all your help.

    -Chris

  • +1 in reply to Chris Yorkey
    TI__Guru* 95315 points

    Chris,

                    As mentioned in the other post, interrupts are tied to a message object, not the IFx register. 

    For the FIFO mode, note that there is an erratum for which there is no workaround: During DCAN FIFO Mode, Received Messages May be Placed Out of Order in the FIFO Buffer. 

    IF3 is a different register in the sense it can only be used for reception.

    Chris Yorkey said:
    The manual does not specify the size of the buffer.

    The FIFO size is not fixed. It is up to user to determine how many message objects to concatenate to form a FIFO.

    Chris Yorkey said:
    We would also like to know if this FIFO can be filled out with messages coming from different nodes in the bus, as long as they specify that the message is not the last message received.

    The "last message" information is not part of the message. It is configured in the message object using the EoB bit.

  • 0 in reply to Hareesh Janakiraman
    TI__Genius 15975 points

    Hareesh, thank you!  This is quite helpful.  I know that one of our customers in particular was asking for this information as well and even asked for a 1on1 call, if possible.  I will see if they can simply add to this thread, if desired, or perhaps discuss setting something up offline.

    Regards,

    Chris

  • 0 in reply to Chris Yorkey
    TI__Genius 15975 points

    Hareesh,

    In fact, additional follow-up questions are as follows if we may please: 

    1. Does the FIFO mode only work when the messages have the same ID? Otherwise, does the arbitration register have a possibility of having a FIFO to hold the ID values?
    2. Can the IF3 work in a FIFO mode? The errata and the technical manual both say the FIFO gets transferred to IF1 and IF2.
    3. If the interrupt is triggered by the message boxes and not by the IF3 register, and the IF3 cannot be used with FIFO OR Interrupt, we cannot see how this register’s automatic functionality works.
    4. For some reason, maybe in this point we are missing some configuration, the IF3 Arbitration Register is holding 0s. The technical manual mentions this ARB mirrors the MSGBOX ARB. The IF3 DATA_A register is holding message box values correctly and we have enabled the ARB register read in the OBS register of the IF3, are we missing something else?

     Thank you again for your help here.

    -Chris

  • 0 in reply to Chris Yorkey
    TI__Guru* 95315 points

    Chris,

        I need to look into the specs to answer some of these questions. Will do so tomorrow.

  • 0 in reply to Hareesh Janakiraman
    TI__Genius 15975 points

    Thank you Hareesh, no rush and again, we appreciate your support.

    -Chris

  • 0 in reply to Chris Yorkey
    TI__Guru* 95315 points
    Chris Yorkey said:
    Does the FIFO mode only work when the messages have the same ID? Otherwise, does the arbitration register have a possibility of having a FIFO to hold the ID values?

    No. FIFO mode is independent of ID (and hence message acceptance). A message (or frame, to be more accurate) will be accepted and copied into the message object RAM if either of the two conditions below are satisfied:

    1. The ID of the received frame is an exact match (bit-for-bit) with the ID of the Receive message object.
    2. The acceptance mask of the receive message object has been configured in such a way to accept the transmitted frame(s). 

    It is important to understand the difference between the message RAM and the IFx registers. A FIFO is built by concatenating the message objects in the message RAM. IFx registers are just a window through which the message objects are accessed. IFx registers, by themselves, have nothing to do with a FIFO. They just temporarily hold the data when data is transferred between the CPU and the message RAM.

    Chris Yorkey said:
    If the interrupt is triggered by the message boxes and not by the IF3 register, and the IF3 cannot be used with FIFO OR Interrupt, we cannot see how this register’s automatic functionality works

    When data is received for message objects that are configured for automatic update through IF3, an interrupt will be generated. This is what the other e2e post also discusses.

    Chris Yorkey said:
    For some reason, maybe in this point we are missing some configuration, the IF3 Arbitration Register is holding 0s. The technical manual mentions this ARB mirrors the MSGBOX ARB. The IF3 DATA_A register is holding message box values correctly and we have enabled the ARB register read in the OBS register of the IF3, are we missing something else?

    No.