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I've seen a couple of examples, and it seems that I'm doing what I should be doing, but nonetheless, I'm seeing zeros in LS memory that has data written by the CPU. Key code snippets are below. I don't doubt that I'm missing something...
From main.c
#pragma DATA_SECTION(src, "ClaData"); // map the TX data to memory
#pragma DATA_SECTION(dst,"ClaData")
#pragma DATA_SECTION(index, "ClaData");
uint16_t index=0;
uint16_t src[16];
uint16_t dst[16];
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS3, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setCLAMemType(MEMCFG_SECT_LS3, MEMCFG_CLA_MEM_DATA);
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_2, (uint16_t)(&Cla1Task2));
CLA_enableIACK(CLA1_BASE);
CLA_enableTasks(CLA1_BASE, CLA_TASKFLAG_ALL);
CLA_forceTasks(CLA1_BASE,CLA_TASKFLAG_2);
In the CLA file
extern uint16_t index;
extern uint16_t src[16];
extern uint16_t dst[16];
__interrupt void Cla1Task2 ( void )
{
GpioDataRegs.GPCTOGGLE.bit.GPIO95=1;
__mdebugstop();
dst[index]=src[index];
index++;
if(index >= 16){
index = 0;
}
}
From the linker file
ClaData : > RAMLS3, ALIGN(4)
In the memory browser from the CPU side, I can see that the data in LS3 is correct. When stepping through Task2, "index" is zero and does not change. "src" seems to point to the right address, but the data read is zero, and the app behaves as if it is reading zero.
Any suggestions on what I may be missing?
Not sure what happened, but coming back to this later, it seems to be working now.