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TMS320F28P650DK: Access Arbitration scheme between CLA and CPU for the CLA/CPU shared Data LSxRAM

Part Number: TMS320F28P650DK

Tool/software:

From what I understood from the provided documentation the arbitration works in a Round Robin style that passes priority between the CPU and CLA one at a time.


Now I come with the following question:
Is it possible to set the arbitration to always give priority to the CLA or the CPU?

For the development I'm doing at the moment it is much more important for me that the CLA is not delayed at all, and even more important that the CPU will always read the 'newest' data written at that address (I don't want the scenario in which the CPU has READ priority over the CLA WRITE)

I would greatly appreciate if this question could be clarified to me,
Thank you!

  • Hi Alex,

    The arbitration happens in hardware and is not configurable. If the CLA is doing read ad write and CPU is only doing reads. it may be better to use the CPU-CLA Message RAMs. As the MSGRAMs have restricted accesses for CLA and CPU read/write and data access only there could be fewer arbitration instances than LSx RAM.

    Thanks,

    Ashwini

  • Thank you for the answer.