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TMS320F28377D-EP: Access Arbitration scheme between CLA and CPU for the CLA/CPU MSGRAM

Laurent Z.
Intellectual 325 points
Part Number: TMS320F28377D-EP

Hello,

Could someone explain to me more precisely how the access arbitration works for the CLA to CPU MSGRAM and CPU to CLA MSGRAM.

Let's take an example, with a CLA task running at 100us and a CPU task running at 1ms.

I want to make sure that the CLA will not write to the MSGRAM at the same time as the CPU read it.

My understanding is that the access arbitration is the same as the Local Shared Memory as described below:

So, regarding the Round Robin Arbitration, the above illustration might be a bit simplified but does it means that the CLA will not overwrite or update the shared variables unless the CPU read it first so that the access arbitration token is back to the CLA. In other word, in this particular case, would the CPU stall the CLA update rate? How does it work?

What really happen when the CLA and the CPU try to access the same memory region at the same time?

I would greatly appreciate a exhaustive explanation.

Thank you so much.

Laurent

  • 0
    TI__Mastermind 30185 points

    Hello Laurent,

    Laurent Z. said:
    I want to make sure that the CLA will not write to the MSGRAM at the same time as the CPU read it.

    Looking at the CLA Message RAM section of the CLA chapter in the technical reference manual (section 6.4.1), there is an arbitration scheme that follows what's mentioned in the Memory Controller Module section of the System Control chapter. There should not be a read and write executing simultaneously on the same message RAM because of this arbitration.

    Laurent Z. said:

    In other word, in this particular case, would the CPU stall the CLA update rate? How does it work?

    What really happen when the CLA and the CPU try to access the same memory region at the same time?

    For the exact arbitration scheme I believe it works like how you've pointed out in the Local Shared Memory, but I will double check with another expert to make sure.

    Best regards,

    Omer Amir

  • 0 in reply to Omer Amir
    Intellectual 325 points

    Hello Omer,

    Thank you for your reply.

    I will definitely need more information regarding this arbitration, it is very critical for our design and safety concern in our application and certification process.

    Thank you

    Laurent

  • 0 in reply to Laurent Z.
    TI__Mastermind 30185 points

    Hello Laurent,

    I am currently waiting on the CLA design experts to get back with me, I will reply next week once I have a response from them.

    Best regards,

    Omer Amir

  • 0 in reply to Omer Amir
    TI__Mastermind 30185 points

    Hello Laurent,

    I have confirmed with some design experts that the CLA message RAM follows the same arbitration as the local shared memories which you have pointed out.

    Best regards,

    Omer Amir

  • 0 in reply to Omer Amir
    Intellectual 325 points

    Thank you Omer,

    I am trying to go a bit deeper in the understanding of the Round Robin, the explanation on the TRM is quite light, so let's take an example:

    Once the CLA write into the MSGRAM (CLA write cycle every 100us), then the picture suggest that the token to get access to the MSGRAM is now on the CPU side. What if the CPU read cycle is every 1ms, does that mean that CLA will not be able to write again into the MSGRAM unless the CPU read it first?

    That are the kind of details I am looking for. This will impact drastically the design and our safety requirements. The understanding of arbitration is very important for safety critical software.

    Thank you very much for your help.

    Laurent.

  • +1 in reply to Laurent Z.
    TI__Mastermind 30185 points

    Hello Laurent,

    If the CLA writes into the message RAM, then either CLA or CPU can read this memory. The round-robin only applies to simultaneous access (not every access), such as when the CLA is writing the same instant the CPU is trying to read from the memory. Depending on where in the round-robin the arbitration is, either the CPU or CLA will be served first. This is not something predictable because the position in the round-robin depends on numerous factors.

    Please keep in mind though that the CPU will never read incorrect data from the CLA to CPU message RAM. In the worst-case scenario when the CLA is writing the instant that the CPU is reading the memory and the round-robin is on RR-CPU, then the CPU will simply read stale data, and the CLA will update it once the CPU is done reading.

    Best regards,

    Omer Amir

  • 0 in reply to Omer Amir
    Intellectual 325 points

    Thank you Omer, this is very useful information.

    However, I have a scenario in my head now.

    What would happen during a 2 words (32bits) read or write?

    For instance, word#1 located at @0x008000 and word#2 located at @0x008001 (LSRAM1)

    The CLA write word #1 but right when CLA finishes with word#1, the CPU want to read words #1 and #2. Would I get word#1 with updated value and word#2 with stale value (from previous cycle) or would the CPU be on hold until both words have been written by the CLA?

    Probably an absurd scenario but I rather ask and be sure than assuming.

    regards,

    Laurent

  • +1 in reply to Laurent Z.
    TI__Mastermind 30185 points

    Hello Laurent,

    If a 32-bit write from the CLA is taking place, the CLA is using the bus. The arbitration takes place on the memory bus, and will stall the other access until the write is complete.

    Best regards,

    Omer Amir