TMS320F28386D: Flash ECC Test

W Z

Part Number: TMS320F28386D

When perform the TI provided sdl_ex_flash_ecc_test.

Technical Reference Manual documents . When ECC test mode is enabled, the CPU cannot read the data from Flash and instead the CPU gets data from the ECC test mode registers (FDATAH_TEST/FDATAL_TEST). This is because ECC test mode registers (FDATAH_TEST, FDATAL_TEST, FECC_TEST) are multiplexed with data from the Flash.

From my understanding that the real flash address shall also have the same data 0xFEDCBA0987654321ULL, but in the debug, it shows not.

How to understand the ECC test mode registers (FDATAH_TEST, FDATAL_TEST, FECC_TEST) are multiplexed with data from the Flash.

over 2 years ago

0 Ibukun Olumuyiwa over 2 years ago

TI__Genius 11081 points

Hello,

(Updated answer)

You should not expect to see valid data written to the ECC test mode registers in the debug window by accessing the flash address. This behavior is undefined, and the TRM specifies not to do this. To confirm data written to the ECC logic for test purposes, use CPU code to perform your verification, or read the test mode registers.

Best regards,
Ibukun

0 W Z over 2 years ago in reply to Ibukun Olumuyiwa

Expert 2380 points

Yes, I understand the TRM's introduction of how to do it.

But I cannot understand TI's multiplexed theory.(ECC test mode registers are multiplexed with data from the Flash.)

Is there detail clarification document?

+1 Ibukun Olumuyiwa over 2 years ago in reply to W Z

TI__Genius 11081 points

No, we do not publish details of internal Flash logic beyond the device technical reference manual.

Best regards,
Ibukun

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TMS320F28386D: Flash ECC Test