Other Parts Discussed in Thread: SYSCONFIG
Hi,
I'm trying to use the DCC module on the F28388 to very quickly detect clock failures:
- SYSCLK is 100MHz,
- CLOCK0 is 25 MHz, coming from OUTPUTXBAR 16
- CLOCK1 is 25 MHz, coming from OUTPUTXBAR 15
I am using DCC0 in continuous mode to check that CLOCK0 and CLOCK1 are running at the same speed, with a very high accuracy (tolerance of 0.002%) -> no problem with that, the formulas provided in the TRM are working just fine.
Then I want to use DCC1 (also in continuous mode) to quickly check when one of the clocks is failing, for that I am using very short counters and valid window:
- Counter0 = 2, Valid0 = 4, Counter1 = 4 --> this doesn't work, even when both clocks are fine, I get the interrupt with the error flag raised (and when I read register values inside the interrupt, I see Counter0 = 0, Valid0 = 0, Counter1 = 0)
Other try with more margin so that it fully fits the DCC error of 16 clock cycles:
- Counter0 = 16, Valid0 = 32, Counter1 = 32 --> same issue, after a few ms I get the error interrupt, with Counter0 = 0, Valid0 = 0, Counter1 = 0
I checked with an oscilloscope that both my clock signals are fine when they arrive to the 28388 chip. How is possible to see an error with these counter/window values? The margin of 16 counts on both sides seems huge, I should not get an error interrupt. Is there any limitation on how we can use the DCC module? Or an issue in the DCC module?
Best regards,
Stephane
