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TMS320F2800157-Q1: Use of TBCLKSYNC

Jay
Prodigy 160 points
Part Number: TMS320F2800157-Q1
Other Parts Discussed in Thread: SYSCONFIG

Hello,

1) After setting TBCLKSYNC =1, will PWM counter starts from TBPHS or from the previous value of TBCTR register?

2) In application, PWMs counter are running in normal operation and One shot trip occurs now, when one shot trip reset happens, which PWM channel's will provide first pulse is not certain

( PWM mode: up down mode

Action qualifier are configured such that CH A give pulse in UP direction while CH B in down direction. As counter is ruining in asyn. fashion, it is giving uncertain behavior in respect to which channel will provide first pulse after one shot reset happens.

After reset sometime CH A giving first pulse and sometime CH B. (How we can fix which CH will give first pulse as PWM counter is asynchronous to reset event. Pls suggest some standard practice)

Thank you. Regards,

  • 0
    TI__Expert 6035 points

    Due to a holiday on account of Memorial Day, please expect a response on Tuesday.

    Thanks.

  • 0
    TI__Genius 9261 points

    Hello Jay,

    I'll answer your questions in order.

    1. PWM Counter should begin from the previous value of TBCTR. In SysConfig, there's an option in the EPWM Time Base settings to force a sync pulse during configuration- this is so that the current value of TBCTR is at the TBPHS value.
    2. The OST latch reset is not synchronous to any TBCTR events, which (as you've observed) means if the OST latch is manually reset, this can occur at any value of TBCTR. I'm not aware of any standard behavior except to either wait for the ePWM to be in a known state (such as by waiting for an ePWM-synchronous interrupt to reset the OST latch) or to force the ePWM to move into one, such as by forcing a synchronization pulse, by utilizing AQSFRC to force the outputs into a known state, directly setting the value of TBCTR, or some combination thereof.
      1. The typical answer in applications that I've looked into is to reset the latch when the ePWM is in a known state, rather than forcing it into one.

    Regards,
    Jason Osborn