Problem getting Independent ePWM Outputs on 2809

I'm trying to setup a simple ePWM configurion: 

  1. count up 

  2. set on zero

  3. maintain independent A/B outputs 

     a. reset A when TBCTL = cmpA

     b. reset B when TBCTL = cmpB

I think I've programmed the Action Qualifier registers correctly, but

I cannot get two independent ePWM outputs on ePWM5. It appears that

the register with the least period "wins" and both outputs follow that

register. E.g., if I set epwm5.CMPA.half.CMPA = 20 and epwm5.CMPB = 50,

i'll get a 20-count duty cycle on both A and B. 

Here's my initialization code:

  //Disable ePWM Interrupts

  epwmFan.ETSEL.bit.INTEN = 0;                          // Disable EPWMxINTn

  epwmFan.TZEINT.bit.CBC  = 0;                          // Disable Trip Zones Cycle By Cycle Interrupt

  epwmFan.TZEINT.bit.OST  = 0;                          // Disable Trip Zones One Shot Interrupt

  //Initialize Peripheral Registers

  epwmFan.TBCTL.bit.FREE_SOFT = 2;                      // Free run - no emmulation suspend

  epwmFan.TBCTL.bit.CLKDIV    = 3;                      // divide by 8

  epwmFan.TBCTL.bit.HSPCLKDIV = 1;                      // divide by 2

  epwmFan.TBCTL.bit.PHSEN = 0;                          // counter not loaded from phase register

  epwmFan.TBCTL.bit.SYNCOSEL = 2;                       // disable syncout

  epwmFan.TBCTL.bit.PRDLD = 1;                          // shadow loading inhibited

  epwmFan.TBCTL.bit.CTRMODE = 0;                        // up counting

  /*

   * F_PWM = SYSCLKOUT / (HSPCLKDIV * CLKDIV * (TBPRD + 1))

   *       = 100E6     / (2         * 8      * 256)

   *       = 24.4 kHz

   */

  epwmFan.TBPRD = (MAX_FAN_PWM - 1);                    // no of counts

  epwmFan.CMPA.half.CMPA = 0;

  epwmFan.CMPB = 0;                                     // not used? not needed?

  epwmFan.CMPCTL.bit.LOADAMODE = 1;                     // load con ctr period

  epwmFan.CMPCTL.bit.LOADBMODE = 1;                     // load con ctr period

  epwmFan.CMPCTL.bit.SHDWAMODE = 0;                     // shadow mode

  epwmFan.CMPCTL.bit.SHDWBMODE = 0;                     // shadow mode

  epwmFan.AQCTLA.bit.CBD = 0;                           // set on compare up-count

  epwmFan.AQCTLA.bit.CBU = 0;

  epwmFan.AQCTLA.bit.CAD = 0;

  epwmFan.AQCTLA.bit.CAU = 2;                           // set on compare up-count

  epwmFan.AQCTLA.bit.PRD = 0;                           // do nothing on period compare

  epwmFan.AQCTLA.bit.ZRO = 1;                           // clear on zero

  epwmFan.AQCTLB.bit.CBD = 0;

  epwmFan.AQCTLB.bit.CBU = 2;

  epwmFan.AQCTLB.bit.CAD = 0;

  epwmFan.AQCTLB.bit.CAU = 0;

  epwmFan.AQCTLB.bit.PRD = 0;

  epwmFan.AQCTLB.bit.ZRO = 1;

  epwmFan.AQSFRC.bit.ACTSFA = 0;                        // do nothing on software forced event

  epwmFan.AQSFRC.bit.ACTSFB = 0;                        // do nothing on software forced event

  epwmFan.DBCTL.bit.OUT_MODE = 0;                       // fully disabled ???spru791 out of date

  epwmFan.DBRED=0;

  epwmFan.DBFED=0;

  epwmFan.PCCTL.bit.CHPEN = 0;                          // disable (by-pass) chopping function

  epwmFan.ETSEL.bit.SOCAEN = 0;                         // Do not enable SOCA pulse

  epwmFan.ETSEL.bit.SOCBEN = 0;                         // Do not enable SOCB pulse

  epwmFan.ETSEL.bit.INTEN  = 0;                         // Do not enable EPWMxINT generation

  epwmFan.TZEINT.all = 0;                               // disable all tripzone interrupts

  epwmFan.TZSEL.all =0;                                 // disable all trip zone sources

  //Clear Any Spurious ePWM Flags (including PIEIFR)

  epwmFan.ETCLR.all = 0xFFFF;                           // clear all Event Trigger Flags

  epwmFan.TZCLR.all = 0xFFFF;                           // clear all Trip Zone Flags

  PieCtrlRegs.PIEIFR2.bit.INTx5 = 0;                      // clear flag EPWM5_TZINT

  PieCtrlRegs.PIEIFR3.bit.INTx5 = 0;                      // clear flag EPWM5_INT

--Randy