Other Parts Discussed in Thread: SFRA
HI,
I recently change my code build output format from COFF to EABI format. After this, I get the below warning
#10272-D section relative symbols from different output sections cannot be mixed; "page0_crc_table" is in section ".bss", "DOT operator" is in section ".TI.crctab"
I tried clearing the warning my working on my linker command file but the warning could not be cleared. Due to this warning, the code does not run in debug mode. The warning is cleared when I disable the CRC check code. The CRC check code and other codes are below:
void saf_crc::InitCRC(void)
{
CRC_reset ();
genCRC32Table();
}
void saf_crc::CRCCal(void)
{
saf_crc::CRCCalPages(&page0_crc_table);
}
void saf_crc::CRCCalPages(const CRC_TABLE *p_crc_table)
{
uint16_t cou = 0;
uint32_t crc_cal_val;
while (cou < p_crc_table->num_recs )
{
crc_cal_val = getCRC32_cpu(INIT_CRC32, (uint16*)(p_crc_table->recs[cou].addr), (CRC_parity_e)CRC_parity_even, ((p_crc_table->recs[cou].size) << 1));
if (crc_cal_val != p_crc_table->recs[cou].crc_value)
{
saf_dev::SafFail(88,9,0);
}
cou++;
}
}
Whenever I comment out this line of code
saf_crc::CRCCalPages(&page0_crc_table);
The warning is removed.
A section of my linker command file is below
/*** Compiler Required Sections ***/
SECTIONS
{
/* Program memory (PAGE 0) sections */
codestart : > BEGIN, PAGE = 0, ALIGN(8)
.text : >> FLASH_BANK0_SEC0 | FLASH_BANK0_SEC1 | FLASH_BANK0_SEC2 | FLASH_BANK0_SEC3 |FLASH_BANK0_SEC4 |FLASH_BANK0_SEC5 |FLASH_BANK0_SEC6 |FLASH_BANK0_SEC7
|FLASH_BANK0_SEC8 | FLASH_BANK0_SEC10_11,
PAGE = 0, ALIGN(4), crc_table(page0_crc_table, algorithm = CRC32_PRIME)
.cinit : > FLASH_BANK0_SEC8, PAGE = 0, ALIGN(4), crc_table(page0_crc_table, algorithm = CRC32_PRIME)
.init_array : > FLASH_BANK0_SEC8, PAGE = 0, ALIGN(4), crc_table(page0_crc_table, algorithm = CRC32_PRIME)
//Global and static const variables that are explicitly initialized
.const : > FLASH_BANK0_SEC6, PAGE = 0, ALIGN(4), crc_table(page0_crc_table, algorithm = CRC32_PRIME)
.switch : > FLASH_BANK0_SEC4, PAGE = 0, ALIGN(4) //empty
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
/* Data Memory (PAGE 1) sections */
.stack : > RAMM0, PAGE = 1
.bss : > RAMLS6_RAMLS7, PAGE = 1 //global and static variables for COFF only //TODO verify if that is large enough
.sysmem : > RAMLS2, PAGE = 1 //Memory for malloc functions (heap) for COFF only
.cio : > RAMLS2, PAGE = 1
.const : > RAMLS2, PAGE = 1
.data : > RAMLS3, PAGE = 1
.bss_cla : > RAMLS3, PAGE = 1
/*** CLA Compiler Required Sections ***/
.scratchpad : > RAMLS3, PAGE = 1 /* Scratchpad memory for the CLA C Compiler */
//controlVariablesCla : > CLA1_MSGRAMLOW, PAGE = 1 /* hold variables that are used in functions called by cla */
controlVariablesCla : > RAMLS3, PAGE = 1 /* hold variables that are used in functions called by cla */
/* Section Ramfuncs used by file device.c. */
GROUP
{
.TI.ramfunc
{
//-l sfra_f32_tmu_coff.lib
}
// ramfuncs
} LOAD = FLASH_BANK0_SEC7
RUN = RAMLS0_RAMLS1,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
PAGE = 0, ALIGN(4), crc_table(page0_crc_table, algorithm = CRC32_PRIME)
.TI.crctab : {} > FLASH_BANK0_SEC8
/*** User Defined Sections ***/
dclfuncs : > RAMLS0_RAMLS1, PAGE = 0 /* Link dcl functions to RAM */
dmaMemBufs : > RAMGS2, PAGE = 1 /* Link to DMA accessible memory */
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1 /* Link to CLA Message RAM */
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1 /* Link to CLA Message RAM */
Cla1Data1 : > RAMLS3, PAGE = 1 /* Link to CLA Data RAM */
Cla1Data2 : > RAMLS3, PAGE = 1 /* Link to CLA Data RAM */
SFRA_F32_Data : > RAMGS2, ALIGN = 64, PAGE = 1
SFRA_Data : > RAMGS2, ALIGN = 64, PAGE=1
/* Section Cla1Prog used by file Cla.c */
Cla1Prog : LOAD = FLASH_BANK0_SEC10_11, /* Load to flash, run from CLA Program RAM */
RUN = RAMLS5,
LOAD_START(Cla1ProgLoadStart),
LOAD_SIZE(Cla1ProgLoadSize),
RUN_START(Cla1ProgRunStart),
PAGE = 0, ALIGN(4), crc_table(page0_crc_table, algorithm = CRC32_PRIME)
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
Please how can i resolve the warning or what is wrong with my code.
Thanks
