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TMS320F280039C: Bi directional Current protection

Part Number: TMS320F280039C
Other Parts Discussed in Thread: C2000WARE, SYSCONFIG

Hello team,

In our application, we planned to use CMPSS to detect both positive and negative over voltages (with an offset voltage of 1.65V). This is mainly to implement over currents in our system. But we are not sure of configuring it to detect negative peak voltages. Please provide required instructions to configure to meet our requirement.

  • Hi,

    I think I would need to know more about your board to recommend how to do this. What is the range of voltages that you expect to feed into the CMPSS input? In what scenario do you want to send the trip signal from the CMPSS module? 

    Best Regards,

    Ben Collier

  • Hi Benjamin,

    Thanks for the reply.

    Our input voltage amplitude is 2V Peak-to-Peak, with an offset of 1.65V. i.e.,(as shown in below).

    the voltage can vary from 0.65V to 2.65V. My requirement is, the CMPSS to be configured for the following two conditions:

    a) if the ADC input is crossing above 2.65V (positive limit)

    b) if the ADC input is falling below 0.65V (negative limit) .

    Please guide us to configure CMPSS block(s) to achieve this.

  • Hi,

    Thank you for this additional information. What do you want to do when you hit your positive and negative limits? Typical application would be to generate a trip signal when a limit is reached, then toggle some of the EPWM outputs while the comparator is tripped. Is that what you want to do? I am trying to understand your goal, so I can properly recommend an example that would be helpful.

    Best Regards,

    Ben Collier

  • Hi Ben collier,

    Thanks for the reply

    What do you want to do when you hit your positive and neg

    we need to generate PWM trip.

    Is that what you want to do?

    Yes

  • Hi,

    Could you please take a look at the cmpss_ex1_asynch example in C2000WARE? It should provide a good starting point for setting up your case for hitting your positive limit. 

    In the case of your negative limit, the setup should be the same, except you would need to select this 'Output is inverted' option in SysConfig: 

    This option will make it so that the trip signal will be generated when your input signal is lower than the DAC reference signal.

    Please let me know if you have any questions about the example, sysconfig, or the CMPSS module. Also I think this diagram from the technical reference manual is pretty helpful in visualizing all of the options that are available in the F28003x Comparator. 

    Best Regards,

    Ben Collier