Hello Ibukun
Until now, this problem (e2e.ti.com/.../tms320f28388d-nmi-by-uncorrectable-error-in-cm) has not occurred again with the NOP at the corresponding location. With the latest software release, this problem occurs again in two other places. The behavior is very similar. An NMI interrupt is triggered and in the register UNC_ERR_ADDR_HIGH or UNC_ERR_ADDR_LOW there is a value pointing into the C1RAM (stack) (0x1FFFCE08, 0x1FFFCF28). If FRDCNTL.RWAIT is increased from 2 to 3, the problem no longer occurs. But according to the specification a RWAIT = 2 should be sufficient with a CPUCLK of 120 MHz. Is this implementation correct or is there another timing condition that requires a larger RWAIT?
With the debugger this problem cannot be observed currently, although the code is also executed from the flash. The functions are located at other addresses.
Best regards
Simon









